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| author | Nick Clifton <nickc@redhat.com> | 2016-11-01 16:45:57 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2016-11-01 16:45:57 +0000 |
| commit | e23eba971dd409b999dd83d8df0f842680c1c642 (patch) | |
| tree | 0002ef536e33bff13648ee1f2c419349f4f91d75 /ld/ChangeLog | |
| parent | 4e56efac8b4d5e251e8edc13febec93992bd6eb4 (diff) | |
| download | gdb-e23eba971dd409b999dd83d8df0f842680c1c642.zip gdb-e23eba971dd409b999dd83d8df0f842680c1c642.tar.gz gdb-e23eba971dd409b999dd83d8df0f842680c1c642.tar.bz2 | |
Add support for RISC-V architecture.
bfd * Makefile.am: Add entries for riscv32-elf and riscv64-elf.
* config.bdf: Likewise.
* configure.ac: Likewise.
* Makefile.in: Regenerate.
* configure: Regenerate.
* archures.c: Add bfd_riscv_arch.
* reloc.c: Add riscv relocs.
* targets.c: Add riscv_elf32_vec and riscv_elf64_vec.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* elf-bfd.h: Add RISCV_ELF_DATA to enum elf_target_id.
* elfnn-riscv.c: New file.
* elfxx-riscv.c: New file.
* elfxx-riscv.h: New file.
binutils* readelf.c (guess_is_rela): Add EM_RISCV.
(get_machine_name): Likewise.
(dump_relocations): Add support for riscv relocations.
(get_machine_flags): Add support for riscv flags.
(is_32bit_abs_reloc): Add R_RISCV_32.
(is_64bit_abs_reloc): Add R_RISCV_64.
(is_none_reloc): Add R_RISCV_NONE.
* testsuite/binutils-all/objdump.exp (cpus_expected): Add riscv.
Expect the debug_ranges test to fail.
gas * Makefile.am: Add riscv files.
* Makefile.in: Regenerate.
* NEWS: Mention the support for this architecture.
* configure.in: Define a default architecture.
* configure: Regenerate.
* configure.tgt: Add entries for riscv.
* doc/as.texinfo: Likewise.
* testsuite/gas/all/gas.exp: Expect the redef tests to fail.
* testsuite/gas/elf/elf.exp: Expect the groupauto tests to fail.
* config/tc-riscv.c: New file.
* config/tc-riscv.h: New file.
* doc/c-riscv.texi: New file.
* testsuite/gas/riscv: New directory.
* testsuite/gas/riscv/riscv.exp: New file.
* testsuite/gas/riscv/t_insns.d: New file.
* testsuite/gas/riscv/t_insns.s: New file.
ld * Makefile.am: Add riscv files.
* Makefile.in: Regenerate.
* NEWS: Mention the support for this target.
* configure.tgt: Add riscv entries.
* emulparams/elf32lriscv-defs.sh: New file.
* emulparams/elf32lriscv.sh: New file.
* emulparams/elf64lriscv-defs.sh: New file.
* emulparams/elf64lriscv.sh: New file.
* emultempl/riscvelf.em: New file.
opcodes * configure.ac: Add entry for bfd_riscv_arch.
* configure: Regenerate.
* disassemble.c (disassembler): Add support for riscv.
(disassembler_usage): Likewise.
* riscv-dis.c: New file.
* riscv-opc.c: New file.
include * dis-asm.h: Add prototypes for print_insn_riscv and
print_riscv_disassembler_options.
* elf/riscv.h: New file.
* opcode/riscv-opc.h: New file.
* opcode/riscv.h: New file.
Diffstat (limited to 'ld/ChangeLog')
| -rw-r--r-- | ld/ChangeLog | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/ld/ChangeLog b/ld/ChangeLog index dacdf8e..a2fb4a4 100644 --- a/ld/ChangeLog +++ b/ld/ChangeLog @@ -1,3 +1,17 @@ +2016-11-01 Palmer Dabbelt <palmer@dabbelt.com> + Andrew Waterman <andrew@sifive.com> + + Add support for RISC-V architecture. + * Makefile.am: Add riscv files. + * Makefile.in: Regenerate. + * NEWS: Mention the support for this target. + * configure.tgt: Add riscv entries. + * emulparams/elf32lriscv-defs.sh: New file. + * emulparams/elf32lriscv.sh: New file. + * emulparams/elf64lriscv-defs.sh: New file. + * emulparams/elf64lriscv.sh: New file. + * emultempl/riscvelf.em: New file. + 2016-10-31 Thomas Preud'homme <thomas.preudhomme@arm.com> * ldmain.c (add_archive_element): Initialize input->header.type. |