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| author | Matthew Malcomson <matthew.malcomson@arm.com> | 2019-05-09 10:29:12 +0100 |
|---|---|---|
| committer | Matthew Malcomson <matthew.malcomson@arm.com> | 2019-05-09 10:29:12 +0100 |
| commit | 7ce2460a77a8f66a145c11522f494f3262255390 (patch) | |
| tree | 74a65e3d48ac6927214a1e2b8b555b908fed7ccd /include | |
| parent | dd3189990b1d918b3a9e482ec6e9cc9a8b9e8fe9 (diff) | |
| download | gdb-7ce2460a77a8f66a145c11522f494f3262255390.zip gdb-7ce2460a77a8f66a145c11522f494f3262255390.tar.gz gdb-7ce2460a77a8f66a145c11522f494f3262255390.tar.bz2 | |
[binutils][aarch64] SVE2 feature extension flags.
Include all feature flag macros.
The "sve2" extension that enables the core sve2 instructions.
This also enables the sve extension, since sve is a requirement of sve2.
Extra optional sve2 features are the bitperm, sm4, aes, and sha3 extensions.
These are all given extra feature flags, "bitperm", "sve2-sm4",
"sve2-aes", and "sve2-sha3" respectively.
The sm4, aes, and sha3 extensions are explicitly marked as sve2
extensions to distinguish them from the corresponding NEON extensions.
Rather than continue extending the current feature flag numbers, I used
some bits that have been skipped.
gas/ChangeLog:
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
* config/tc-aarch64.c: Add command line architecture feature flags
"sve2", "sve2-sm4", "sve2-aes", "sve2-sha3", "bitperm".
* doc/c-aarch64.texi: Document new architecture feature flags.
include/ChangeLog:
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_SVE2
AARCH64_FEATURE_SVE2_AES, AARCH64_FEATURE_SVE2_BITPERM,
AARCH64_FEATURE_SVE2_SM4, AARCH64_FEATURE_SVE2_SHA3): New
feature macros.
opcodes/ChangeLog:
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
* aarch64-tbl.h
(aarch64_feature_sve2, aarch64_feature_sve2aes,
aarch64_feature_sve2sha3, aarch64_feature_sve2sm4,
aarch64_feature_sve2bitperm): New feature sets.
(SVE2, SVE2_AES, SVE2_SHA3, SVE2_SM4, SVE2_BITPERM): New macros
for feature set addresses.
(SVE2_INSN, SVE2_INSNC, SVE2AES_INSN, SVE2SHA3_INSN,
SVE2SM4_INSN, SVE2SM4_INSNC, SVE2BITPERM_INSN): New macros.
Diffstat (limited to 'include')
| -rw-r--r-- | include/ChangeLog | 7 | ||||
| -rw-r--r-- | include/opcode/aarch64.h | 7 |
2 files changed, 14 insertions, 0 deletions
diff --git a/include/ChangeLog b/include/ChangeLog index cab6418..1ce57a4 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,10 @@ +2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com> + + * opcode/aarch64.h (AARCH64_FEATURE_SVE2 + AARCH64_FEATURE_SVE2_AES, AARCH64_FEATURE_SVE2_BITPERM, + AARCH64_FEATURE_SVE2_SM4, AARCH64_FEATURE_SVE2_SHA3): New + feature macros. + 2019-05-06 Andrew Bennett <andrew.bennett@imgtec.com> Faraz Shahbazker <fshahbazker@wavecomp.com> diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index c456f67..fdc7cde 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -89,6 +89,13 @@ typedef uint32_t aarch64_insn; /* Transactional Memory Extension. */ #define AARCH64_FEATURE_TME 0x2000000000000ULL +/* SVE2 instructions. */ +#define AARCH64_FEATURE_SVE2 0x000000010 +#define AARCH64_FEATURE_SVE2_AES 0x000000080 +#define AARCH64_FEATURE_SVE2_BITPERM 0x000000100 +#define AARCH64_FEATURE_SVE2_SM4 0x000000200 +#define AARCH64_FEATURE_SVE2_SHA3 0x000000400 + /* Architectures are the sum of the base and extensions. */ #define AARCH64_ARCH_V8 AARCH64_FEATURE (AARCH64_FEATURE_V8, \ AARCH64_FEATURE_FP \ |