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authorThomas Preud'homme <thomas.preudhomme@arm.com>2015-12-24 17:26:08 +0800
committerThomas Preud'homme <thomas.preudhomme@arm.com>2015-12-24 17:27:21 +0800
commitff8646eef8bdef6fe3091eb79627929c1c100c6a (patch)
tree22b3df21915370c9fc6a15be5816f4db93e77edf /include
parent4ed7ed8db2289a9cd61312c14344cb210dc229b7 (diff)
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Add assembler support for ARMv8-M Baseline
2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com> bfd/ (tag_cpu_arch_combine): Adjust comment in v4t_plus_v6_m with regards to merging with ARMv8-M Baseline. binutils/ * readelf.c (arm_attr_tag_CPU_arch): Add ARMv8-M Baseline Tag_CPU_arch value. gas/ * config/tc-arm.c (arm_ext_v6t2_v8m): New feature for instructions shared between ARMv6T2 and ARMv8-M. (move_or_literal_pool): Check mov.w/mvn and movw availability against arm_ext_v6t2 and arm_ext_v6t2_v8m respectively instead of checking arm_arch_t2. (do_t_branch): Error out for wide conditional branch instructions if targetting ARMv8-M Baseline. (non_v6t2_wide_only_insn): Add the logic for new wide-only instructions in ARMv8-M Baseline. (wide_insn_ok): New function. (md_assemble): Use wide_insn_ok instead of non_v6t2_wide_only_insn and adapt error message for unsupported wide instruction to ARMv8-M Baseline. (insns): Reorganize instructions shared by ARMv8-M Baseline and ARMv6t2 architecture. (arm_cpus): Set feature bit ARM_EXT2_V6T2_V8M for marvell-pj4 and marvell-whitney cores. (arm_archs): Define armv8-m.base architecture. (cpu_arch_ver): Define ARM_ARCH_V8M_BASE architecture version. (aeabi_set_public_attributes): Add logic to set Tag_CPU_arch to 17 for ARMv8-M Mainline. Set Tag_DIV_use for ARMv8-M Baseline as well. gas/testsuite/ * gas/arm/archv8m-base.d: New file. * gas/arm/attr-march-armv8m.base.d: Likewise. * gas/arm/armv8m.base-idiv.d: Likewise. * gas/arm/any-armv8m.d: Adapt to deal with ARMv8-M Baseline. include/elf/ * arm.h (TAG_CPU_ARCH_V8M_BASE): Declare. include/opcode/ * arm.h (ARM_EXT2_V6T2_V8M): New extension bit. (ARM_AEXT2_V8A): New architecture extension bitfield. (ARM_AEXT2_V8_1A): Use ARM_AEXT2_V8A instead of ARM_EXT2_ATOMICS. (ARM_AEXT_V8M_BASE): New architecture extension bitfield. (ARM_AEXT2_V8M): Add extension bit ARM_EXT2_V6T2_V8M. (ARM_ARCH_V6T2): Use ARM_EXT2_V6T2_V8M for the second extension bitfield. (ARM_ARCH_V6KT2): Likewise. (ARM_ARCH_V6ZT2): Likewise. (ARM_ARCH_V6KZT2): Likewise. (ARM_ARCH_V7): Likewise. (ARM_ARCH_V7A): Likewise. (ARM_ARCH_V7VE): Likewise. (ARM_ARCH_V7R): Likewise. (ARM_ARCH_V7M): Likewise. (ARM_ARCH_V7EM): Likewise. (ARM_ARCH_V8A): Likewise. (ARM_ARCH_V8M_BASE): New architecture bitfield. (ARM_ARCH_THUMB2): Include instructions shared by ARMv6t2 and ARMv8-M. (ARM_ARCH_V7A_SEC): Use ARM_EXT2_V6T2_V8M for the second extension bitfield and reindent. (ARM_ARCH_V7A_MP_SEC): Likewise. (ARM_ARCH_V7R_IDIV): Likewise. (ARM_ARCH_V8A_FP): Use ARM_AEXT2_V8A instead of ARM_EXT2_ATOMICS. (ARM_ARCH_V8A_SIMD): Likewise. (ARM_ARCH_V8A_CRYPTOV1): Likewise. opcodes/ * arm-dis.c (arm_opcodes): Guard movw, movt cbz, cbnz, clrex, ldrex, ldrexb, ldrexh, strex, strexb, strexh shared by ARMv6T2 and ARMv8-M by ARM_EXT2_V6T2_V8M instead of ARM_EXT_V6T2.
Diffstat (limited to 'include')
-rw-r--r--include/elf/ChangeLog4
-rw-r--r--include/elf/arm.h1
-rw-r--r--include/opcode/ChangeLog29
-rw-r--r--include/opcode/arm.h49
4 files changed, 62 insertions, 21 deletions
diff --git a/include/elf/ChangeLog b/include/elf/ChangeLog
index b083168..045d843 100644
--- a/include/elf/ChangeLog
+++ b/include/elf/ChangeLog
@@ -1,5 +1,9 @@
2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
+ * arm.h (TAG_CPU_ARCH_V8M_BASE): Declare.
+
+2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
* arm.h (TAG_CPU_ARCH_V8M_MAIN): Declare.
(MAX_TAG_CPU_ARCH): Define to TAG_CPU_ARCH_V8M_MAIN.
(TAG_CPU_ARCH_V4T_PLUS_V6_M): Define to unused value 15.
diff --git a/include/elf/arm.h b/include/elf/arm.h
index 631cd98e..b5b8eca 100644
--- a/include/elf/arm.h
+++ b/include/elf/arm.h
@@ -106,6 +106,7 @@
#define TAG_CPU_ARCH_V6S_M 12
#define TAG_CPU_ARCH_V7E_M 13
#define TAG_CPU_ARCH_V8 14
+#define TAG_CPU_ARCH_V8M_BASE 16
#define TAG_CPU_ARCH_V8M_MAIN 17
#define MAX_TAG_CPU_ARCH TAG_CPU_ARCH_V8M_MAIN
/* Pseudo-architecture to allow objects to be compatible with the subset of
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index a3b6a182..b9d524d 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,5 +1,34 @@
2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
+ * arm.h (ARM_EXT2_V6T2_V8M): New extension bit.
+ (ARM_AEXT2_V8A): New architecture extension bitfield.
+ (ARM_AEXT2_V8_1A): Use ARM_AEXT2_V8A instead of ARM_EXT2_ATOMICS.
+ (ARM_AEXT_V8M_BASE): New architecture extension bitfield.
+ (ARM_AEXT2_V8M): Add extension bit ARM_EXT2_V6T2_V8M.
+ (ARM_ARCH_V6T2): Use ARM_EXT2_V6T2_V8M for the second extension
+ bitfield.
+ (ARM_ARCH_V6KT2): Likewise.
+ (ARM_ARCH_V6ZT2): Likewise.
+ (ARM_ARCH_V6KZT2): Likewise.
+ (ARM_ARCH_V7): Likewise.
+ (ARM_ARCH_V7A): Likewise.
+ (ARM_ARCH_V7VE): Likewise.
+ (ARM_ARCH_V7R): Likewise.
+ (ARM_ARCH_V7M): Likewise.
+ (ARM_ARCH_V7EM): Likewise.
+ (ARM_ARCH_V8A): Likewise.
+ (ARM_ARCH_V8M_BASE): New architecture bitfield.
+ (ARM_ARCH_THUMB2): Include instructions shared by ARMv6t2 and ARMv8-M.
+ (ARM_ARCH_V7A_SEC): Use ARM_EXT2_V6T2_V8M for the second extension
+ bitfield and reindent.
+ (ARM_ARCH_V7A_MP_SEC): Likewise.
+ (ARM_ARCH_V7R_IDIV): Likewise.
+ (ARM_ARCH_V8A_FP): Use ARM_AEXT2_V8A instead of ARM_EXT2_ATOMICS.
+ (ARM_ARCH_V8A_SIMD): Likewise.
+ (ARM_ARCH_V8A_CRYPTOV1): Likewise.
+
+2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
* arm.h (ARM_EXT2_ATOMICS): New extension bit.
(ARM_EXT2_V8M): Likewise.
(ARM_EXT_V8): Adjust comment with regards to atomics and remove
diff --git a/include/opcode/arm.h b/include/opcode/arm.h
index 2edcfe3..81ec2c5 100644
--- a/include/opcode/arm.h
+++ b/include/opcode/arm.h
@@ -60,6 +60,7 @@
#define ARM_EXT2_V8_2A 0x00000002 /* ARM V8.2A. */
#define ARM_EXT2_V8M 0x00000004 /* ARM V8M. */
#define ARM_EXT2_ATOMICS 0x00000008 /* ARMv8 atomics. */
+#define ARM_EXT2_V6T2_V8M 0x00000010 /* V8M Baseline from V6T2. */
/* Co-processor space extensions. */
#define ARM_CEXT_XSCALE 0x00000001 /* Allow MIA etc. */
@@ -142,10 +143,12 @@
#define ARM_AEXT_V8A \
(ARM_AEXT_V7A | ARM_EXT_MP | ARM_EXT_SEC | ARM_EXT_DIV | ARM_EXT_ADIV \
| ARM_EXT_VIRT | ARM_EXT_V8)
-#define ARM_AEXT2_V8_1A (ARM_EXT2_ATOMICS | ARM_EXT2_PAN)
+#define ARM_AEXT2_V8A (ARM_EXT2_V6T2_V8M | ARM_EXT2_ATOMICS)
+#define ARM_AEXT2_V8_1A (ARM_AEXT2_V8A | ARM_EXT2_PAN)
#define ARM_AEXT2_V8_2A (ARM_AEXT2_V8_1A | ARM_EXT2_V8_2A)
+#define ARM_AEXT_V8M_BASE (ARM_AEXT_V6SM | ARM_EXT_DIV)
#define ARM_AEXT_V8M_MAIN ARM_AEXT_V7M
-#define ARM_AEXT2_V8M (ARM_EXT2_V8M | ARM_EXT2_ATOMICS)
+#define ARM_AEXT2_V8M (ARM_EXT2_V8M | ARM_EXT2_ATOMICS | ARM_EXT2_V6T2_V8M)
/* Processors with specific extensions in the co-processor space. */
#define ARM_ARCH_XSCALE ARM_FEATURE_LOW (ARM_AEXT_V5TE, ARM_CEXT_XSCALE)
@@ -243,23 +246,24 @@
#define ARM_ARCH_V6K ARM_FEATURE_CORE_LOW (ARM_AEXT_V6K)
#define ARM_ARCH_V6Z ARM_FEATURE_CORE_LOW (ARM_AEXT_V6Z)
#define ARM_ARCH_V6KZ ARM_FEATURE_CORE_LOW (ARM_AEXT_V6KZ)
-#define ARM_ARCH_V6T2 ARM_FEATURE_CORE_LOW (ARM_AEXT_V6T2)
-#define ARM_ARCH_V6KT2 ARM_FEATURE_CORE_LOW (ARM_AEXT_V6KT2)
-#define ARM_ARCH_V6ZT2 ARM_FEATURE_CORE_LOW (ARM_AEXT_V6ZT2)
-#define ARM_ARCH_V6KZT2 ARM_FEATURE_CORE_LOW (ARM_AEXT_V6KZT2)
+#define ARM_ARCH_V6T2 ARM_FEATURE_CORE (ARM_AEXT_V6T2, ARM_EXT2_V6T2_V8M)
+#define ARM_ARCH_V6KT2 ARM_FEATURE_CORE (ARM_AEXT_V6KT2, ARM_EXT2_V6T2_V8M)
+#define ARM_ARCH_V6ZT2 ARM_FEATURE_CORE (ARM_AEXT_V6ZT2, ARM_EXT2_V6T2_V8M)
+#define ARM_ARCH_V6KZT2 ARM_FEATURE_CORE (ARM_AEXT_V6KZT2, ARM_EXT2_V6T2_V8M)
#define ARM_ARCH_V6M ARM_FEATURE_CORE_LOW (ARM_AEXT_V6M)
#define ARM_ARCH_V6SM ARM_FEATURE_CORE_LOW (ARM_AEXT_V6SM)
-#define ARM_ARCH_V7 ARM_FEATURE_CORE_LOW (ARM_AEXT_V7)
-#define ARM_ARCH_V7A ARM_FEATURE_CORE_LOW (ARM_AEXT_V7A)
-#define ARM_ARCH_V7VE ARM_FEATURE_CORE_LOW (ARM_AEXT_V7VE)
-#define ARM_ARCH_V7R ARM_FEATURE_CORE_LOW (ARM_AEXT_V7R)
-#define ARM_ARCH_V7M ARM_FEATURE_CORE_LOW (ARM_AEXT_V7M)
-#define ARM_ARCH_V7EM ARM_FEATURE_CORE_LOW (ARM_AEXT_V7EM)
-#define ARM_ARCH_V8A ARM_FEATURE_CORE (ARM_AEXT_V8A, ARM_EXT2_ATOMICS)
+#define ARM_ARCH_V7 ARM_FEATURE_CORE (ARM_AEXT_V7, ARM_EXT2_V6T2_V8M)
+#define ARM_ARCH_V7A ARM_FEATURE_CORE (ARM_AEXT_V7A, ARM_EXT2_V6T2_V8M)
+#define ARM_ARCH_V7VE ARM_FEATURE_CORE (ARM_AEXT_V7VE, ARM_EXT2_V6T2_V8M)
+#define ARM_ARCH_V7R ARM_FEATURE_CORE (ARM_AEXT_V7R, ARM_EXT2_V6T2_V8M)
+#define ARM_ARCH_V7M ARM_FEATURE_CORE (ARM_AEXT_V7M, ARM_EXT2_V6T2_V8M)
+#define ARM_ARCH_V7EM ARM_FEATURE_CORE (ARM_AEXT_V7EM, ARM_EXT2_V6T2_V8M)
+#define ARM_ARCH_V8A ARM_FEATURE_CORE (ARM_AEXT_V8A, ARM_AEXT2_V8A)
#define ARM_ARCH_V8_1A ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_1A, \
CRC_EXT_ARMV8)
#define ARM_ARCH_V8_2A ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8_2A, \
CRC_EXT_ARMV8)
+#define ARM_ARCH_V8M_BASE ARM_FEATURE_CORE (ARM_AEXT_V8M_BASE, ARM_AEXT2_V8M)
#define ARM_ARCH_V8M_MAIN ARM_FEATURE_CORE (ARM_AEXT_V8M_MAIN, ARM_AEXT2_V8M)
/* Some useful combinations: */
@@ -270,26 +274,29 @@
#define FPU_ANY_HARD ARM_FEATURE_COPROC (FPU_FPA | FPU_VFP_HARD | FPU_MAVERICK)
/* Extensions containing some Thumb-2 instructions. If any is present, Thumb
ISA is Thumb-2. */
-#define ARM_ARCH_THUMB2 ARM_FEATURE_CORE_LOW (ARM_EXT_V6T2 | ARM_EXT_V7 \
- | ARM_EXT_DIV | ARM_EXT_V8)
+#define ARM_ARCH_THUMB2 ARM_FEATURE_CORE (ARM_EXT_V6T2 | ARM_EXT_V7 \
+ | ARM_EXT_DIV | ARM_EXT_V8, \
+ ARM_EXT2_ATOMICS | ARM_EXT2_V6T2_V8M)
/* v7-a+sec. */
-#define ARM_ARCH_V7A_SEC ARM_FEATURE_CORE_LOW (ARM_AEXT_V7A | ARM_EXT_SEC)
+#define ARM_ARCH_V7A_SEC \
+ ARM_FEATURE_CORE (ARM_AEXT_V7A | ARM_EXT_SEC, ARM_EXT2_V6T2_V8M)
/* v7-a+mp+sec. */
#define ARM_ARCH_V7A_MP_SEC \
- ARM_FEATURE_CORE_LOW (ARM_AEXT_V7A | ARM_EXT_MP | ARM_EXT_SEC)
+ ARM_FEATURE_CORE (ARM_AEXT_V7A | ARM_EXT_MP | ARM_EXT_SEC, ARM_EXT2_V6T2_V8M)
/* v7-r+idiv. */
-#define ARM_ARCH_V7R_IDIV ARM_FEATURE_CORE_LOW (ARM_AEXT_V7R | ARM_EXT_ADIV)
+#define ARM_ARCH_V7R_IDIV \
+ ARM_FEATURE_CORE (ARM_AEXT_V7R | ARM_EXT_ADIV, ARM_EXT2_V6T2_V8M)
/* Features that are present in v6M and v6S-M but not other v6 cores. */
#define ARM_ARCH_V6M_ONLY ARM_FEATURE_CORE_LOW (ARM_AEXT_V6M_ONLY)
/* v8-a+fp. */
#define ARM_ARCH_V8A_FP \
- ARM_FEATURE (ARM_AEXT_V8A, ARM_EXT2_ATOMICS, FPU_ARCH_VFP_ARMV8)
+ ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8A, FPU_ARCH_VFP_ARMV8)
/* v8-a+simd (implies fp). */
#define ARM_ARCH_V8A_SIMD \
- ARM_FEATURE (ARM_AEXT_V8A, ARM_EXT2_ATOMICS, FPU_ARCH_NEON_VFP_ARMV8)
+ ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8A, FPU_ARCH_NEON_VFP_ARMV8)
/* v8-a+crypto (implies simd+fp). */
#define ARM_ARCH_V8A_CRYPTOV1 \
- ARM_FEATURE (ARM_AEXT_V8A, ARM_EXT2_ATOMICS, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8)
+ ARM_FEATURE (ARM_AEXT_V8A, ARM_AEXT2_V8A, FPU_ARCH_CRYPTO_NEON_VFP_ARMV8)
/* v8.1-a+fp. */
#define ARM_ARCH_V8_1A_FP \