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author | Andrew Burgess <aburgess@redhat.com> | 2022-07-04 17:45:25 +0100 |
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committer | Andrew Burgess <aburgess@redhat.com> | 2022-07-25 14:02:30 +0100 |
commit | 4f46c0bc36471b725de0253bfec1a42a36e2c5c5 (patch) | |
tree | 9a11bc8262ef1113f92202a430045ec3ac0577d2 /include | |
parent | 2cb10f02b0e0d0d062c97c19defef1e5e334b13b (diff) | |
download | gdb-4f46c0bc36471b725de0253bfec1a42a36e2c5c5.zip gdb-4f46c0bc36471b725de0253bfec1a42a36e2c5c5.tar.gz gdb-4f46c0bc36471b725de0253bfec1a42a36e2c5c5.tar.bz2 |
opcodes: add new sub-mnemonic disassembler style
When adding libopcodes disassembler styling support for AArch64, it
feels like the results would be improved by having a new sub-mnemonic
style. This will be used in cases like:
add w16, w7, w1, uxtb #2
^^^^----- Here
And:
cinc w0, w1, ne
^^----- Here
This commit just adds the new style, and prepares objdump to handle
the style. A later commit will add AArch64 styling, and will actually
make use of the style.
As this style is currently unused, there should be no user visible
changes after this commit.
Diffstat (limited to 'include')
-rw-r--r-- | include/dis-asm.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/include/dis-asm.h b/include/dis-asm.h index 4f91df1..f1a83dc 100644 --- a/include/dis-asm.h +++ b/include/dis-asm.h @@ -62,6 +62,13 @@ enum disassembler_style instructions. */ dis_style_mnemonic, + /* Some architectures include additional mnemonic like fields within the + instruction operands, e.g. on aarch64 'add w16, w7, w1, lsl #2' where + the 'lsl' is an additional piece of text that describes how the + instruction should behave. This sub-mnemonic style can be used for + these pieces of text. */ + dis_style_sub_mnemonic, + /* For things that aren't real machine instructions, but rather assembler directives, e.g. .byte, etc. */ dis_style_assembler_directive, |