diff options
| author | Maciej W. Rozycki <macro@linux-mips.org> | 2010-07-06 00:02:46 +0000 |
|---|---|---|
| committer | Maciej W. Rozycki <macro@linux-mips.org> | 2010-07-06 00:02:46 +0000 |
| commit | 9a2c7088871654be1a94ea4d721fb9c76b4a3162 (patch) | |
| tree | b75cc830de7cef29246d029e0b3a296707b88d2f /include | |
| parent | bf501491eae0fd3a0451fded1a51fe58f6010e11 (diff) | |
| download | gdb-9a2c7088871654be1a94ea4d721fb9c76b4a3162.zip gdb-9a2c7088871654be1a94ea4d721fb9c76b4a3162.tar.gz gdb-9a2c7088871654be1a94ea4d721fb9c76b4a3162.tar.bz2 | |
gas/
* config/tc-mips.c (nops_for_insn_or_target): Replace
MIPS16_INSN_BRANCH with MIPS16_INSN_UNCOND_BRANCH and
MIPS16_INSN_COND_BRANCH.
include/opcode/
* mips.h (MIPS16_INSN_UNCOND_BRANCH): New macro.
(MIPS16_INSN_BRANCH): Rename to...
(MIPS16_INSN_COND_BRANCH): ... this.
opcodes/
* mips-dis.c (print_mips16_insn_arg): Remove branch instruction
type and delay slot determination.
(print_insn_mips16): Extend branch instruction type and delay
slot determination to cover all instructions.
* mips16-opc.c (BR): Remove macro.
(UBR, CBR): New macros.
(mips16_opcodes): Update branch annotation for "b", "beqz",
"bnez", "bteqz" and "btnez". Add branch annotation for "jalrc"
and "jrc".
Diffstat (limited to 'include')
| -rw-r--r-- | include/opcode/ChangeLog | 6 | ||||
| -rw-r--r-- | include/opcode/mips.h | 6 |
2 files changed, 10 insertions, 2 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index b19f1aa..aa09a3a 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,9 @@ +2010-07-06 Maciej W. Rozycki <macro@codesourcery.com> + + * mips.h (MIPS16_INSN_UNCOND_BRANCH): New macro. + (MIPS16_INSN_BRANCH): Rename to... + (MIPS16_INSN_COND_BRANCH): ... this. + 2010-07-03 Alan Modra <amodra@gmail.com> * ppc.h (PPC_OPCODE_32, PPC_OPCODE_BOOKE64, PPC_OPCODE_CLASSIC): Delete. diff --git a/include/opcode/mips.h b/include/opcode/mips.h index 45085bd..2fb9672 100644 --- a/include/opcode/mips.h +++ b/include/opcode/mips.h @@ -1089,8 +1089,10 @@ extern int bfd_mips_num_opcodes; #define MIPS16_INSN_READ_PC 0x00002000 /* Reads the general purpose register in MIPS16OP_*_REGR32. */ #define MIPS16_INSN_READ_GPR_X 0x00004000 -/* Is a branch insn. */ -#define MIPS16_INSN_BRANCH 0x00010000 +/* Is an unconditional branch insn. */ +#define MIPS16_INSN_UNCOND_BRANCH 0x00008000 +/* Is a conditional branch insn. */ +#define MIPS16_INSN_COND_BRANCH 0x00010000 /* The following flags have the same value for the mips16 opcode table: |