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author | Andrew Burgess <andrew.burgess@embecosm.com> | 2016-03-30 00:02:19 +0100 |
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committer | Andrew Burgess <andrew.burgess@embecosm.com> | 2016-04-14 17:16:46 +0100 |
commit | 4b0c052e456421a3c6d7b4c98be3ad0b3bd2ad27 (patch) | |
tree | ba2ad6919a72787b533fdc37c2694aa49522995d /include | |
parent | 33cbe6c07ed7e66d65c106cffb496eff5d7e8fb5 (diff) | |
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arc/nps400 : New cmem instructions and associated relocation
Add support for arc/nps400 cmem instructions, these load and store
instructions are hard-wired to access "0x57f00000 + 16-bit-offset".
Supporting this relocation required some additions to the arc relocation
handling in the bfd library, as well as the standard changes required to
add a new relocation type.
There's a test of the new instructions in the assembler, and a test of
the relocation in the linker.
bfd/ChangeLog:
* reloc.c: Add BFD_RELOC_ARC_NPS_CMEM16 entry.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* elf32-arc.c: Add 'opcode/arc.h' include.
(struct arc_relocation_data): Add symbol_name.
(arc_special_overflow_checks): New function.
(arc_do_relocation): Use arc_special_overflow_checks, reindent as
required, add an extra comment.
(elf_arc_relocate_section): Setup symbol_name in reloc_data.
gas/ChangeLog:
* testsuite/gas/arc/nps400-3.d: New file.
* testsuite/gas/arc/nps400-3.s: New file.
include/ChangeLog:
* elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
* opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
ld/ChangeLog:
* testsuite/ld-arc/arc.exp: New file.
* testsuite/ld-arc/nps-1.s: New file.
* testsuite/ld-arc/nps-1a.d: New file.
* testsuite/ld-arc/nps-1b.d: New file.
* testsuite/ld-arc/nps-1b.err: New file.
opcodes/ChangeLog:
* arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
instructions.
* arc-opc.c (insert_nps_cmem_uimm16): New function.
(extract_nps_cmem_uimm16): New function.
(arc_operands): Add NPS_XLDST_UIMM16 operand.
Diffstat (limited to 'include')
-rw-r--r-- | include/ChangeLog | 5 | ||||
-rw-r--r-- | include/elf/arc-reloc.def | 7 | ||||
-rw-r--r-- | include/opcode/arc.h | 3 |
3 files changed, 15 insertions, 0 deletions
diff --git a/include/ChangeLog b/include/ChangeLog index c7ac36b..8c16d79 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,8 @@ +2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com> + + * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc. + * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define. + 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com> * opcode/arc.h (flag_class_t): Update. diff --git a/include/elf/arc-reloc.def b/include/elf/arc-reloc.def index 36a3516..10703d2 100644 --- a/include/elf/arc-reloc.def +++ b/include/elf/arc-reloc.def @@ -490,3 +490,10 @@ ARC_RELOC_HOWTO(ARC_S21H_PCREL_PLT, 77, \ replace_disp21h, \ signed, \ ( ME ( ( ( ( L + A ) - P ) >> 1 ) ) )) + +ARC_RELOC_HOWTO(ARC_NPS_CMEM16, 78, \ + 2, \ + 16, \ + replace_bits16, \ + dont, \ + ( S + A )) diff --git a/include/opcode/arc.h b/include/opcode/arc.h index 7cd78e4..2811877 100644 --- a/include/opcode/arc.h +++ b/include/opcode/arc.h @@ -437,6 +437,9 @@ extern const unsigned arc_num_aux_regs; extern const struct arc_opcode arc_relax_opcodes[]; extern const unsigned arc_num_relax_opcodes; +/* Macro used for generating one class of NPS instructions. */ +#define NPS_CMEM_HIGH_VALUE 0x57f0 + /* Macros to help generating regular pattern instructions. */ #define FIELDA(word) (word & 0x3F) #define FIELDB(word) (((word & 0x07) << 24) | (((word >> 3) & 0x07) << 12)) |