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| author | Maciej W. Rozycki <macro@linux-mips.org> | 2019-04-25 01:28:49 +0100 |
|---|---|---|
| committer | Maciej W. Rozycki <macro@linux-mips.org> | 2019-04-25 01:28:49 +0100 |
| commit | cd0923370be1a6412e9b8fb5c8e9e39d90f1d3ea (patch) | |
| tree | 428e4b055699675356b4a4db29c453123e15fd97 /include | |
| parent | f88dbe3f8a9cef79a6ff32ba3734a7a308b8ea26 (diff) | |
| download | gdb-cd0923370be1a6412e9b8fb5c8e9e39d90f1d3ea.zip gdb-cd0923370be1a6412e9b8fb5c8e9e39d90f1d3ea.tar.gz gdb-cd0923370be1a6412e9b8fb5c8e9e39d90f1d3ea.tar.bz2 | |
MIPS/include: opcode/mips.h: Update stale comment for CODE20 operand
Complement commit 1586d91e32ea ("/ 0 should send SIGFPE not SIGTRAP..."),
<https://sourceware.org/ml/binutils/2004-07/msg00260.html>, and update a
stale comment referring the 20-bit code field of the BREAK and SDBBP
instructions, by making it explicit that where permitted by choosing the
MIPS32 or a later ISA the whole field can now be set with a single
operand for the SDBBP instruction only.
include/
* opcode/mips.h: Update comment for MIPS32 CODE20 operand.
Diffstat (limited to 'include')
| -rw-r--r-- | include/ChangeLog | 4 | ||||
| -rw-r--r-- | include/opcode/mips.h | 4 |
2 files changed, 6 insertions, 2 deletions
diff --git a/include/ChangeLog b/include/ChangeLog index 038a070..01bb920 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,7 @@ +2019-04-25 Maciej W. Rozycki <macro@linux-mips.org> + + * opcode/mips.h: Update comment for MIPS32 CODE20 operand. + 2019-04-15 Sudakshina Das <sudi.das@arm.com> * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF12. diff --git a/include/opcode/mips.h b/include/opcode/mips.h index abd52c8..4309e1a 100644 --- a/include/opcode/mips.h +++ b/include/opcode/mips.h @@ -56,8 +56,8 @@ extern "C" { code field in BREAK is 20 bits; yet MIPS assemblers and debuggers only use ten bits). An optional two-operand form of break/sdbbp allows the lower ten bits to be set too, and MIPS32 and later - architectures allow 20 bits to be set with a signal operand - (using CODE20). + architectures allow 20 bits to be set with a single operand for + the sdbbp instruction (using CODE20). The syscall instruction uses CODE20. |