RISC-V/t-head: Add CSRs and opcodes of the T-HEAD XUANTIE CPUs

Add CSRs and opcodes of the XUANTIE CPUs, extensions named "theadc",
"xtheade" and "xtheadse".

New ARG format for operands:
"Xgm@n": encode GPR with m bit at opcode[m+n-1:n].
  "Xg5@0": encode GPR with 5 bit at opcode[4:0].
  "Xg5@8": encode GPR with 5 bit at opcode[12:8].

"XIm@n": m bits unsigned immediate at opcode[m+n-1:n].
  "XI5@0": 5 bits unsigned immediate at opcode[4:0].
  "XI4@8": 4 bits unsigned immediate at opcode[11:8].

"XSm@n": m bits signed immediate at opcode[m+n-1:n].
  "XS5@0": 5 bits signed immediate at opcode[4:0].
  "XS4@8": 4 bits signed immediate at opcode[11:8].

"XFm@n": m bits FR at opcode[m+n-1:n].
  "XF5@0": 5 bits FR at opcode[4:0].
  "XF5@0": 5 bits FR at opcode[4:0].

bfd/
	* cpu-riscv.h (enum riscv_spec_class)
	<VENDOR_SPEC_CLASS_THEAD>: New.
	* elfxx-riscv.c (riscv_supported_vendor_thead_ext): New.
	(riscv_all_supported_ext): Updated.
	(riscv_get_default_ext_version): Updated.
gas/
	* config/tc-riscv.c (VENDOR_THEAD_EXT): New.
	(enum riscv_extended_csr_class) <CSR_CLASS_VENDOR_THEAD>: New.
	(riscv_extended_subset_supports): Check subset: INSN_CLASS_THEAD*
	(op_vendor_thead_hash): New, the hash of T-HEAD Xuantie's opcodes.
	(riscv_csr_address): Skip check version for T-HEAD Xuantie CPUs.
	(validate_riscv_extended_insn): Parsing T-HEAD opargs.
	(md_begin): Init op_vendor_thead_hash.
	(riscv_find_extended_opcode_hash): Search op_vendor_thead_hash.
	(riscv_parse_extended_operands): Parsing T-HEAD opargs.
	* testsuite/gas/riscv/extended/thead*: New testcases.
include/
	* opcode/riscv-opc-extended.h: Add CSRs and opcode of the T-HEAD
	XUANTIE CPUs.
	* opcode/riscv.h (riscv_extended_insn_class)
	<INSN_CLASS_THEADC>: New.
	<INSN_CLASS_THEADC_OR_THEADE>: New.
	<INSN_CLASS_THEADC_OR_THEADE_OR_THEADSE>: New.
	<INSN_CLASS_THEADE>: New.
	<INSN_CLASS_THEADSE>: New.
	(*VENDOR_THEAD_*): T-HEAD IMM encoding.
opcodes/
	* riscv-dis.c (print_extended_insn_args): Parsing T-HEAD opargs.
	* riscv-opc.c (match_thead_rd1_rd2_neq_rs1): New.
	(riscv_vendor_thead_opcodes): New.
	(riscv_extended_opcodes): Add riscv_vendor_thead_opcodes.

2 files changed, 581 insertions, 0 deletions

diff --git a/include/opcode/riscv-opc-extended.h b/include/opcode/riscv-opc-extended.h
index 6f664ed..3de8809 100644
--- a/include/opcode/riscv-opc-extended.h
+++ b/include/opcode/riscv-opc-extended.h
@@ -1520,3 +1520,561 @@ DECLARE_CSR(vl, CSR_VL, CSR_CLASS_V, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
 DECLARE_CSR(vtype, CSR_VTYPE, CSR_CLASS_V, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
 DECLARE_CSR(vlenb, CSR_VLENB, CSR_CLASS_V, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
 #endif /* DECLARE_CSR */
+
+#ifndef __RISCV_OPC_VENDOR_THEAD__
+#define __RISCV_OPC_VENDOR_THEAD__
+/* Opcodes for T-HEAD.  */
+#define MATCH_DCACHE_CALL	0x0010000b
+#define MASK_DCACHE_CALL	0xffffffff
+#define MATCH_DCACHE_IALL	0x0020000b
+#define MASK_DCACHE_IALL	0xffffffff
+#define MATCH_DCACHE_CSW	0x0210000b
+#define MASK_DCACHE_CSW		0xfff07fff
+#define MATCH_DCACHE_ISW	0x0220000b
+#define MASK_DCACHE_ISW		0xfff07fff
+#define MATCH_DCACHE_CIALL	0x0030000b
+#define MASK_DCACHE_CIALL	0xffffffff
+#define MATCH_DCACHE_CISW	0x0230000b
+#define MASK_DCACHE_CISW	0xfff07fff
+#define MATCH_DCACHE_CVAL1	0x0240000b
+#define MASK_DCACHE_CVAL1	0xfff07fff
+#define MATCH_DCACHE_CVA	0x0250000b
+#define MASK_DCACHE_CVA		0xfff07fff
+#define MATCH_DCACHE_IVA	0x0260000b
+#define MASK_DCACHE_IVA		0xfff07fff
+#define MATCH_DCACHE_CIVA	0x0270000b
+#define MASK_DCACHE_CIVA	0xfff07fff
+#define MATCH_DCACHE_CPAL1	0x0280000b
+#define MASK_DCACHE_CPAL1	0xfff07fff
+#define MATCH_DCACHE_CPA	0x0290000b
+#define MASK_DCACHE_CPA		0xfff07fff
+#define MATCH_DCACHE_IPA	0x02a0000b
+#define MASK_DCACHE_IPA		0xfff07fff
+#define MATCH_DCACHE_CIPA	0x02b0000b
+#define MASK_DCACHE_CIPA	0xfff07fff
+#define MATCH_ICACHE_IALL	0x0100000b
+#define MASK_ICACHE_IALL	0xffffffff
+#define MATCH_ICACHE_IALLS	0x0110000b
+#define MASK_ICACHE_IALLS	0xffffffff
+#define MATCH_ICACHE_IVA	0x0300000b
+#define MASK_ICACHE_IVA		0xfff07fff
+#define MATCH_ICACHE_IPA	0x0380000b
+#define MASK_ICACHE_IPA		0xfff07fff
+#define MATCH_L2CACHE_CALL	0x0150000b
+#define MASK_L2CACHE_CALL	0xffffffff
+#define MATCH_L2CACHE_IALL	0x0160000b
+#define MASK_L2CACHE_IALL	0xffffffff
+#define MATCH_L2CACHE_CIALL	0x0170000b
+#define MASK_L2CACHE_CIALL	0xffffffff
+#define MATCH_SYNC		0x0180000b
+#define MASK_SYNC		0xffffffff
+#define MATCH_SYNC_S		0x0190000b
+#define MASK_SYNC_S		0xffffffff
+#define MATCH_SYNC_I		0x01a0000b
+#define MASK_SYNC_I		0xffffffff
+#define MATCH_SYNC_IS		0x01b0000b
+#define MASK_SYNC_IS		0xffffffff
+#define MATCH_SFENCE_VMAS	0x0400000b
+#define MASK_SFENCE_VMAS	0xfe007fff
+#define MATCH_TSTNBZ		0x8000100b
+#define MASK_TSTNBZ		0xfff0707f
+#define MATCH_MVEQZ		0x4000100b
+#define MASK_MVEQZ		0xfe00707f
+#define MATCH_MVNEZ		0x4200100b
+#define MASK_MVNEZ		0xfe00707f
+#define MATCH_MULA		0x2000100b
+#define MASK_MULA		0xfe00707f
+#define MATCH_MULS		0x2200100b
+#define MASK_MULS		0xfe00707f
+#define MATCH_MULAW		0x2400100b
+#define MASK_MULAW		0xfe00707f
+#define MATCH_MULSW		0x2600100b
+#define MASK_MULSW		0xfe00707f
+#define MATCH_MULAH		0x2800100b
+#define MASK_MULAH		0xfe00707f
+#define MATCH_MULSH		0x2a00100b
+#define MASK_MULSH		0xfe00707f
+#define MATCH_EXT		0x0000200b
+#define MASK_EXT		0x0000707f
+#define MATCH_EXTU		0x0000300b
+#define MASK_EXTU		0x0000707f
+#define MATCH_LRB		0x0000400b
+#define MASK_LRB		0xf800707f
+#define MATCH_LRH		0x2000400b
+#define MASK_LRH		0xf800707f
+#define MATCH_LRW		0x4000400b
+#define MASK_LRW		0xf800707f
+#define MATCH_LRD		0x6000400b
+#define MASK_LRD		0xf800707f
+#define MATCH_LRBU		0x8000400b
+#define MASK_LRBU		0xf800707f
+#define MATCH_LRHU		0xa000400b
+#define MASK_LRHU		0xf800707f
+#define MATCH_LRWU		0xc000400b
+#define MASK_LRWU		0xf800707f
+#define MATCH_LURB		0x1000400b
+#define MASK_LURB		0xf800707f
+#define MATCH_LURH		0x3000400b
+#define MASK_LURH		0xf800707f
+#define MATCH_LURW		0x5000400b
+#define MASK_LURW		0xf800707f
+#define MATCH_LURD		0x7000400b
+#define MASK_LURD		0xf800707f
+#define MATCH_LURBU		0x9000400b
+#define MASK_LURBU		0xf800707f
+#define MATCH_LURHU		0xb000400b
+#define MASK_LURHU		0xf800707f
+#define MATCH_LURWU		0xd000400b
+#define MASK_LURWU		0xf800707f
+#define MATCH_REV		0x8200100b
+#define MASK_REV		0xfff0707f
+#define MATCH_FF0		0x8400100b
+#define MASK_FF0		0xfff0707f
+#define MATCH_FF1		0x8600100b
+#define MASK_FF1		0xfff0707f
+#define MATCH_SRB		0x0000500b
+#define MASK_SRB		0xf800707f
+#define MATCH_SRH		0x2000500b
+#define MASK_SRH		0xf800707f
+#define MATCH_SRW		0x4000500b
+#define MASK_SRW		0xf800707f
+#define MATCH_SRD		0x6000500b
+#define MASK_SRD		0xf800707f
+#define MATCH_SURB		0x1000500b
+#define MASK_SURB		0xf800707f
+#define MATCH_SURH		0x3000500b
+#define MASK_SURH		0xf800707f
+#define MATCH_SURW		0x5000500b
+#define MASK_SURW		0xf800707f
+#define MATCH_SURD		0x7000500b
+#define MASK_SURD		0xf800707f
+#define MATCH_TST		0x8800100b
+#define MASK_TST		0xfc00707f
+#define MATCH_SRRIW		0x1400100b
+#define MASK_SRRIW		0xfe00707f
+#define MATCH_SRRI		0x1000100b
+#define MASK_SRRI		0xfc00707f
+#define MATCH_ADDSL		0x0000100b
+#define MASK_ADDSL		0xf800707f
+#define MATCH_SWD		0xe000500b
+#define MASK_SWD		0xf800707f
+#define MATCH_SDD		0xf800500b
+#define MASK_SDD		0xf800707f
+#define MATCH_SDIA		0x7800500b
+#define MASK_SDIA		0xf800707f
+#define MATCH_SDIB		0x6800500b
+#define MASK_SDIB		0xf800707f
+#define MATCH_SWIA		0x5800500b
+#define MASK_SWIA		0xf800707f
+#define MATCH_SWIB		0x4800500b
+#define MASK_SWIB		0xf800707f
+#define MATCH_SHIB		0x2800500b
+#define MASK_SHIB		0xf800707f
+#define MATCH_SHIA		0x3800500b
+#define MASK_SHIA		0xf800707f
+#define MATCH_SBIA		0x1800500b
+#define MASK_SBIA		0xf800707f
+#define MATCH_SBIB		0x0800500b
+#define MASK_SBIB		0xf800707f
+#define MATCH_LWUD		0xf000400b
+#define MASK_LWUD		0xf800707f
+#define MATCH_LWD		0xe000400b
+#define MASK_LWD		0xf800707f
+#define MATCH_LDD		0xf800400b
+#define MASK_LDD		0xf800707f
+#define MATCH_LWUIA		0xd800400b
+#define MASK_LWUIA		0xf800707f
+#define MATCH_LWUIB		0xc800400b
+#define MASK_LWUIB		0xf800707f
+#define MATCH_LHUIA		0xb800400b
+#define MASK_LHUIA		0xf800707f
+#define MATCH_LHUIB		0xa800400b
+#define MASK_LHUIB		0xf800707f
+#define MATCH_LBUIA		0x9800400b
+#define MASK_LBUIA		0xf800707f
+#define MATCH_LBUIB		0x8800400b
+#define MASK_LBUIB		0xf800707f
+#define MATCH_LDIA		0x7800400b
+#define MASK_LDIA		0xf800707f
+#define MATCH_LDIB		0x6800400b
+#define MASK_LDIB		0xf800707f
+#define MATCH_LWIA		0x5800400b
+#define MASK_LWIA		0xf800707f
+#define MATCH_LWIB		0x4800400b
+#define MASK_LWIB		0xf800707f
+#define MATCH_LHIA		0x3800400b
+#define MASK_LHIA		0xf800707f
+#define MATCH_LHIB		0x2800400b
+#define MASK_LHIB		0xf800707f
+#define MATCH_LBIA		0x1800400b
+#define MASK_LBIA		0xf800707f
+#define MATCH_LBIB		0x0800400b
+#define MASK_LBIB		0xf800707f
+#define MATCH_REVW		0x9000100b
+#define MASK_REVW		0xfff0707f
+#define MATCH_FSURD		0x7000700b
+#define MASK_FSURD		0xf800707f
+#define MATCH_FSURW		0x5000700b
+#define MASK_FSURW		0xf800707f
+#define MATCH_FSRD		0x6000700b
+#define MASK_FSRD		0xf800707f
+#define MATCH_FSRW		0x4000700b
+#define MASK_FSRW		0xf800707f
+#define MATCH_FLURD		0x7000600b
+#define MASK_FLURD		0xf800707f
+#define MATCH_FLURW		0x5000600b
+#define MASK_FLURW		0xf800707f
+#define MATCH_FLRD		0x6000600b
+#define MASK_FLRD		0xf800707f
+#define MATCH_FLRW		0x4000600b
+#define MASK_FLRW		0xf800707f
+#define MATCH_IPUSH		0x0040000b
+#define MASK_IPUSH		0xffffffff
+#define MATCH_IPOP		0x0050000b
+#define MASK_IPOP		0xffffffff
+/* T-HEAD security.  */
+#define MATCH_WSC		0xcff01073
+#define MASK_WSC 		0xffffffff
+/* T-HEAD Float for rv32.  */
+#define MATCH_FMV_X_HW		0xc000100b
+#define MASK_FMV_X_HW 		0xfff0707f
+#define MATCH_FMV_HW_X		0xa000100b
+#define MASK_FMV_HW_X 		0xfff0707f
+#endif /* __RISCV_OPC_VENDOR_THEAD__ */
+#ifdef DECLARE_INSN
+DECLARE_INSN(wsc, MATCH_WSC, MASK_WSC)
+DECLARE_INSN(dcache.iall, MATCH_DCACHE_IALL, MASK_DCACHE_IALL)
+DECLARE_INSN(dcache.call, MATCH_DCACHE_CALL, MASK_DCACHE_CALL)
+DECLARE_INSN(dcache.ciall, MATCH_DCACHE_CIALL, MASK_DCACHE_CIALL)
+DECLARE_INSN(dcache.isw, MATCH_DCACHE_ISW, MASK_DCACHE_ISW, match_opcode, 0)
+DECLARE_INSN(dcache.csw, MATCH_DCACHE_CSW, MASK_DCACHE_CSW)
+DECLARE_INSN(dcache.cisw, MATCH_DCACHE_CISW, MASK_DCACHE_CISW)
+DECLARE_INSN(dcache.iva, MATCH_DCACHE_IVA, MASK_DCACHE_IVA)
+DECLARE_INSN(dcache.cva, MATCH_DCACHE_CVA, MASK_DCACHE_CVA)
+DECLARE_INSN(dcache.cval1, MATCH_DCACHE_CVAL1, MASK_DCACHE_CVAL1)
+DECLARE_INSN(dcache.civa, MATCH_DCACHE_CIVA, MASK_DCACHE_CIVA)
+DECLARE_INSN(dcache.ipa, MATCH_DCACHE_IPA, MASK_DCACHE_IPA)
+DECLARE_INSN(dcache.cpa, MATCH_DCACHE_CPA, MASK_DCACHE_CPA)
+DECLARE_INSN(dcache.cpal1, MATCH_DCACHE_CPAL1, MASK_DCACHE_CPAL1)
+DECLARE_INSN(dcache.cipa, MATCH_DCACHE_CIPA, MASK_DCACHE_CIPA)
+DECLARE_INSN(icache.iall, MATCH_ICACHE_IALL, MASK_ICACHE_IALL)
+DECLARE_INSN(icache.iall, MATCH_ICACHE_IALL, MASK_ICACHE_IALL, match_opcode)
+DECLARE_INSN(icache.ialls, MATCH_ICACHE_IALLS, MASK_ICACHE_IALLS)
+DECLARE_INSN(icache.iva, MATCH_ICACHE_IVA, MASK_ICACHE_IVA)
+DECLARE_INSN(icache.ipa, MATCH_ICACHE_IPA, MASK_ICACHE_IPA)
+DECLARE_INSN(l2cache.iall, MATCH_L2CACHE_IALL, MASK_L2CACHE_IALL)
+DECLARE_INSN(l2cache.call, MATCH_L2CACHE_CALL, MASK_L2CACHE_CALL)
+DECLARE_INSN(l2cache.ciall, MATCH_L2CACHE_CIALL, MASK_L2CACHE_CIALL)
+DECLARE_INSN(sync, MATCH_SYNC, MASK_SYNC)
+DECLARE_INSN(sync.i, MATCH_SYNC_I, MASK_SYNC_I)
+DECLARE_INSN(sync.s, MATCH_SYNC_S, MASK_SYNC_S)
+DECLARE_INSN(sync.is, MATCH_SYNC_IS, MASK_SYNC_IS)
+DECLARE_INSN(tstnbz, MATCH_TSTNBZ, MASK_TSTNBZ)
+DECLARE_INSN(mula, MATCH_MULA, MASK_MULA)
+DECLARE_INSN(muls, MATCH_MULS, MASK_MULS)
+DECLARE_INSN(mulah, MATCH_MULAH, MASK_MULAH)
+DECLARE_INSN(mulsh, MATCH_MULSH, MASK_MULSH)
+DECLARE_INSN(sfence.vmas, MATCH_SFENCE_VMAS, MASK_SFENCE_VMAS)
+DECLARE_INSN(mveqz, MATCH_MVEQZ, MASK_MVEQZ)
+DECLARE_INSN(mvnez, MATCH_MVNEZ, MASK_MVNEZ)
+DECLARE_INSN(mulaw, MATCH_MULAW, MASK_MULAW)
+DECLARE_INSN(mulsw, MATCH_MULSW, MASK_MULSW)
+DECLARE_INSN(ext, MATCH_EXT, MASK_EXT)
+DECLARE_INSN(ext, MATCH_EXT, (MASK_EXT | (1U<<25) | (1U<<31)))
+DECLARE_INSN(extu, MATCH_EXTU, MASK_EXTU)
+DECLARE_INSN(extu, MATCH_EXTU, (MASK_EXTU | (1U<<25) | (1U<<31)))
+DECLARE_INSN(ff1, MATCH_FF1, MASK_FF1)
+DECLARE_INSN(ff0, MATCH_FF0, MASK_FF1)
+DECLARE_INSN(rev, MATCH_REV, MASK_REV)
+DECLARE_INSN(lrb, MATCH_LRB, MASK_LRB)
+DECLARE_INSN(lrbu, MATCH_LRBU, MASK_LRBU)
+DECLARE_INSN(lrh, MATCH_LRH, MASK_LRH)
+DECLARE_INSN(lrhu, MATCH_LRHU, MASK_LRHU)
+DECLARE_INSN(lrw, MATCH_LRW, MASK_LRW)
+DECLARE_INSN(lrwu, MATCH_LRWU, MASK_LRWU)
+DECLARE_INSN(srb, MATCH_SRB, MASK_SRB)
+DECLARE_INSN(srh, MATCH_SRH, MASK_SRH)
+DECLARE_INSN(srw, MATCH_SRW, MASK_SRW)
+DECLARE_INSN(lrd, MATCH_LRD, MASK_LRD)
+DECLARE_INSN(srd, MATCH_SRD, MASK_SRD)
+DECLARE_INSN(lurb, MATCH_LURB, MASK_LURB)
+DECLARE_INSN(lurbu, MATCH_LURBU, MASK_LURBU)
+DECLARE_INSN(lurh, MATCH_LURH, MASK_LURH)
+DECLARE_INSN(lurhu, MATCH_LURHU, MASK_LURHU)
+DECLARE_INSN(lurw, MATCH_LURW, MASK_LURW)
+DECLARE_INSN(lurwu, MATCH_LURWU, MASK_LURWU)
+DECLARE_INSN(lurd, MATCH_LURD, MASK_LURD)
+DECLARE_INSN(surb, MATCH_SURB, MASK_SURB)
+DECLARE_INSN(surh, MATCH_SURH, MASK_SURH)
+DECLARE_INSN(surw, MATCH_SURW, MASK_SURW)
+DECLARE_INSN(surd, MATCH_SURD, MASK_SURD)
+DECLARE_INSN(tst, MATCH_TST, MASK_TST)
+DECLARE_INSN(tst, MATCH_TST, (MASK_TST | (1U << 25)), match_opcode)
+DECLARE_INSN(srriw, MATCH_SRRIW, MASK_SRRIW)
+DECLARE_INSN(srri, MATCH_SRRI, MASK_SRRI)
+DECLARE_INSN(addsl, MATCH_ADDSL, MASK_ADDSL)
+DECLARE_INSN(lwd, MATCH_LWD, MASK_LWD)
+DECLARE_INSN(ldd, MATCH_LDD, MASK_LDD)
+DECLARE_INSN(swd, MATCH_SWD, MASK_SWD)
+DECLARE_INSN(sdd, MATCH_SDD, MASK_SDD)
+DECLARE_INSN(sdia, MATCH_SDIA, MASK_SDIA)
+DECLARE_INSN(sdib, MATCH_SDIB, MASK_SDIB)
+DECLARE_INSN(lwud, MATCH_LWUD, MASK_LWUD)
+DECLARE_INSN(lwud, MATCH_LWUD, MASK_LWUD)
+DECLARE_INSN(swia, MATCH_SWIA, MASK_SWIA)
+DECLARE_INSN(swib, MATCH_SWIB, MASK_SWIB)
+DECLARE_INSN(shia, MATCH_SHIA, MASK_SHIA)
+DECLARE_INSN(shib, MATCH_SHIB, MASK_SHIB)
+DECLARE_INSN(sbia, MATCH_SBIA, MASK_SBIA)
+DECLARE_INSN(sbib, MATCH_SBIB, MASK_SBIB)
+DECLARE_INSN(lwuia, MATCH_LWUIA, MASK_LWUIA)
+DECLARE_INSN(lwuib, MATCH_LWUIB, MASK_LWUIB)
+DECLARE_INSN(lhuia, MATCH_LHUIA, MASK_LHUIA)
+DECLARE_INSN(lhuib, MATCH_LHUIB, MASK_LHUIB)
+DECLARE_INSN(lbuia, MATCH_LBUIA, MASK_LBUIA)
+DECLARE_INSN(lbuib, MATCH_LBUIB, MASK_LBUIB)
+DECLARE_INSN(ldia, MATCH_LDIA, MASK_LDIA)
+DECLARE_INSN(ldib, MATCH_LDIB, MASK_LDIB)
+DECLARE_INSN(lwia, MATCH_LWIA, MASK_LWIA)
+DECLARE_INSN(lwib, MATCH_LWIB, MASK_LWIB)
+DECLARE_INSN(lhia, MATCH_LHIA, MASK_LHIA)
+DECLARE_INSN(lhib, MATCH_LHIB, MASK_LHIB)
+DECLARE_INSN(lbia, MATCH_LBIA, MASK_LBIA)
+DECLARE_INSN(lbib, MATCH_LBIB, MASK_LBIB)
+DECLARE_INSN(fsurd, MATCH_FSURD, MASK_FSURD)
+DECLARE_INSN(revw, MATCH_REVW, MASK_REVW)
+DECLARE_INSN(fsurw, MATCH_FSURW, MASK_FSURW)
+DECLARE_INSN(flurd, MATCH_FLURD, MASK_FLURD)
+DECLARE_INSN(flurw, MATCH_FLURW, MASK_FLURW)
+DECLARE_INSN(fsrd, MATCH_FSRD, MASK_FSRD)
+DECLARE_INSN(fsrw, MATCH_FSRW, MASK_FSRW)
+DECLARE_INSN(flrd, MATCH_FLRD, MASK_FLRD)
+DECLARE_INSN(flrw, MATCH_FLRW, MASK_FLRW)
+DECLARE_INSN(ipush, MATCH_IPUSH, MASK_IPUSH)
+DECLARE_INSN(ipop, MATCH_IPOP, MASK_IPOP)
+DECLARE_INSN(fmv.x.hw, MATCH_FMV_X_HW, MASK_FMV_X_HW)
+DECLARE_INSN(fmv.hw.x, MATCH_FMV_HW_X, MASK_FMV_HW_X)
+#endif /* DECLARE_INSN */
+#ifdef DECLARE_CSR
+/* T-HEAD M mode CSR.  */
+#define CSR_MXSTATUS 0x7c0
+#define CSR_MHCR 0x7c1
+#define CSR_MCOR 0x7c2
+#define CSR_MCCR2 0x7c3
+#define CSR_MCER2 0x7c4
+#define CSR_MHINT 0x7c5
+#define CSR_MRMR 0x7c6
+#define CSR_MRVBR 0x7c7
+#define CSR_MCER 0x7c8
+#define CSR_MCOUNTERWEN 0x7c9
+#define CSR_MCOUNTERINTEN 0x7ca
+#define CSR_MCOUNTEROF 0x7cb
+#define CSR_MHINT2 0x7cc
+#define CSR_MHINT3 0x7cd
+#define CSR_MRADDR 0x7e0
+#define CSR_MEXSTATUS 0x7e1
+#define CSR_MNMICAUSE 0x7e2
+#define CSR_MNMIPC 0x7e3
+#define CSR_MHPMCR 0x7f0
+#define CSR_MHPMSR 0x7f1
+#define CSR_MHPMER 0x7f2
+#define CSR_MSMPR 0x7f3
+#define CSR_MTEECFG 0x7f4
+#define CSR_MZONEID 0x7f5
+#define CSR_ML2CPID 0x7f6
+#define CSR_ML2WP 0x7f7
+#define CSR_MDTCMCR 0x7f8
+#define CSR_USP 0x7d1
+#define CSR_MCINS 0x7d2
+#define CSR_MCINDEX 0x7d3
+#define CSR_MCDATA0 0x7d4
+#define CSR_MCDATA1 0x7d5
+#define CSR_MEICR 0x7d6
+#define CSR_MEICR2 0x7d7
+#define CSR_MBEADDR 0x7d8
+#define CSR_MCPUID 0xfc0
+#define CSR_MAPBADDR 0xfc1
+#define CSR_MWMSR 0xfc2
+#define CSR_MHALTCAUSE 0xfe0
+#define CSR_MDBGINFO 0xfe1
+#define CSR_MPCFIFO 0xfe2
+/* T-HEAD S mode CSR.  */
+#define CSR_SXSTATUS 0x5c0
+#define CSR_SHCR 0x5c1
+#define CSR_SCER2 0x5c2
+#define CSR_SCER 0x5c3
+#define CSR_SCOUNTERINTEN 0x5c4
+#define CSR_SCOUNTEROF 0x5c5
+#define CSR_SHINT 0x5c6
+#define CSR_SHINT2 0x5c7
+#define CSR_SHPMINHIBIT 0x5c8
+#define CSR_SHPMCR 0x5c9
+#define CSR_SHPMSR 0x5ca
+#define CSR_SHPMER 0x5cb
+#define CSR_SL2CPID 0x5cc
+#define CSR_SL2WP 0x5cd
+#define CSR_SBEADDR 0x5d0
+#define CSR_SCYCLE 0x5e0
+#define CSR_SHPMCOUNTER1 0x5e1
+#define CSR_SHPMCOUNTER2 0x5e2
+#define CSR_SHPMCOUNTER3 0x5e3
+#define CSR_SHPMCOUNTER4 0x5e4
+#define CSR_SHPMCOUNTER5 0x5e5
+#define CSR_SHPMCOUNTER6 0x5e6
+#define CSR_SHPMCOUNTER7 0x5e7
+#define CSR_SHPMCOUNTER8 0x5e8
+#define CSR_SHPMCOUNTER9 0x5e9
+#define CSR_SHPMCOUNTER10 0x5ea
+#define CSR_SHPMCOUNTER11 0x5eb
+#define CSR_SHPMCOUNTER12 0x5ec
+#define CSR_SHPMCOUNTER13 0x5ed
+#define CSR_SHPMCOUNTER14 0x5ee
+#define CSR_SHPMCOUNTER15 0x5ef
+#define CSR_SHPMCOUNTER16 0x5f0
+#define CSR_SHPMCOUNTER17 0x5f1
+#define CSR_SHPMCOUNTER18 0x5f2
+#define CSR_SHPMCOUNTER19 0x5f3
+#define CSR_SHPMCOUNTER20 0x5f4
+#define CSR_SHPMCOUNTER21 0x5f5
+#define CSR_SHPMCOUNTER22 0x5f6
+#define CSR_SHPMCOUNTER23 0x5f7
+#define CSR_SHPMCOUNTER24 0x5f8
+#define CSR_SHPMCOUNTER25 0x5f9
+#define CSR_SHPMCOUNTER26 0x5fa
+#define CSR_SHPMCOUNTER27 0x5fb
+#define CSR_SHPMCOUNTER28 0x5fc
+#define CSR_SHPMCOUNTER29 0x5fd
+#define CSR_SHPMCOUNTER30 0x5fe
+#define CSR_SHPMCOUNTER31 0x5ff
+/* T-HEAD U mode CSR.  */
+#define CSR_FXCR 0x800
+/* T-HEAD MMU extentions.  */
+#define CSR_SMIR 0x9c0
+#define CSR_SMEL 0x9c1
+#define CSR_SMEH 0x9c2
+#define CSR_SMCIR 0x9c3
+/* T-HEAD Security CSR(May be droped).  */
+#define CSR_MEBR 0xbe0
+#define CSR_NT_MSTATUS 0xbe1
+#define CSR_NT_MIE 0xbe2
+#define CSR_NT_MTVEC 0xbe3
+#define CSR_NT_MTVT 0xbe4
+#define CSR_NT_MEPC 0xbe5
+#define CSR_NT_MCAUSE 0xbe6
+#define CSR_NT_MIP 0xbe7
+#define CSR_NT_MINTSTATE 0xbe8
+#define CSR_NT_MXSTATUS 0xbe9
+#define CSR_NT_MEBR 0xbea
+#define CSR_NT_MSP 0xbeb
+#define CSR_T_USP 0xbec
+#define CSR_T_MDCR 0xbed
+#define CSR_T_MPCR 0xbee
+#define CSR_PMPTEECFG 0xbef
+/* T-HEAD extentions.  */
+DECLARE_CSR(mxstatus, CSR_MXSTATUS, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mhcr, CSR_MHCR, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mcor, CSR_MCOR, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mccr2, CSR_MCCR2, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mcer2, CSR_MCER2, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mhint, CSR_MHINT, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mrmr, CSR_MRMR, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mrvbr, CSR_MRVBR, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mcer, CSR_MCER, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mcounterwen, CSR_MCOUNTERWEN, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mcounterinten, CSR_MCOUNTERINTEN, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mcounterof, CSR_MCOUNTEROF, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mhint2, CSR_MHINT2, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mhint3, CSR_MHINT3, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mraddr, CSR_MRADDR, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mexstatus, CSR_MEXSTATUS, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mnmicause, CSR_MNMICAUSE, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mnmipc, CSR_MNMIPC, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mhpmcr, CSR_MHPMCR, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mhpmsr, CSR_MHPMSR, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mhpmer, CSR_MHPMER, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(msmpr, CSR_MSMPR, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mteecfg, CSR_MTEECFG, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mzoneid, CSR_MZONEID, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(ml2cpid, CSR_ML2CPID, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(ml2wp, CSR_ML2WP, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mdtcmcr, CSR_MDTCMCR, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(usp, CSR_USP, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mcins, CSR_MCINS, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mcindex, CSR_MCINDEX, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mcdata0, CSR_MCDATA0, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mcdata1, CSR_MCDATA1, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(meicr, CSR_MEICR, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(meicr2, CSR_MEICR2, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mbeaddr, CSR_MBEADDR, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mebr, CSR_MEBR, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(nt_mstatus, CSR_NT_MSTATUS, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(nt_mtvec, CSR_NT_MTVEC, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(nt_mie, CSR_NT_MIE, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(nt_mtvt, CSR_NT_MTVT, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(nt_mepc, CSR_NT_MEPC, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(nt_mcause, CSR_NT_MCAUSE, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(nt_mip, CSR_NT_MIP, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(nt_mintstate, CSR_NT_MINTSTATE, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(nt_mxstatus, CSR_NT_MXSTATUS, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(nt_mebr, CSR_NT_MEBR, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(nt_msp, CSR_NT_MSP, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(t_usp, CSR_T_USP, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(t_mdcr, CSR_T_MDCR, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(t_mpcr, CSR_T_MPCR, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(pmpteecfg, CSR_PMPTEECFG, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mcpuid, CSR_MCPUID, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mapbaddr, CSR_MAPBADDR, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(mwmsr, CSR_MWMSR, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(fxcr, CSR_FXCR, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(smir, CSR_SMIR, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(smel, CSR_SMEL, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(smeh, CSR_SMEH, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(smcir, CSR_SMCIR, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(sxstatus, CSR_SXSTATUS, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shcr, CSR_SHCR, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(scer2, CSR_SCER2, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(scer, CSR_SCER, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(scounterinten , CSR_SCOUNTERINTEN, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(scounterof, CSR_SCOUNTEROF, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shint, CSR_SHINT, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shint2, CSR_SHINT2, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shpminhibit, CSR_SHPMINHIBIT, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shpmcr, CSR_SHPMCR, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shpmsr, CSR_SHPMSR, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shpmer, CSR_SHPMER, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(sl2cpid, CSR_SL2CPID, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(sl2wp, CSR_SL2WP, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(sbeaddr, CSR_SBEADDR, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(scycle, CSR_SCYCLE, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shpmcounter1, CSR_SHPMCOUNTER1, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shpmcounter2, CSR_SHPMCOUNTER2, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shpmcounter3, CSR_SHPMCOUNTER3, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shpmcounter4, CSR_SHPMCOUNTER4, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shpmcounter5, CSR_SHPMCOUNTER5, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shpmcounter6, CSR_SHPMCOUNTER6, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shpmcounter7, CSR_SHPMCOUNTER7, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shpmcounter8, CSR_SHPMCOUNTER8, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shpmcounter9, CSR_SHPMCOUNTER9, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shpmcounter10, CSR_SHPMCOUNTER10, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shpmcounter11, CSR_SHPMCOUNTER11, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shpmcounter12, CSR_SHPMCOUNTER12, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shpmcounter13, CSR_SHPMCOUNTER13, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shpmcounter14, CSR_SHPMCOUNTER14, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shpmcounter15, CSR_SHPMCOUNTER15, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shpmcounter16, CSR_SHPMCOUNTER16, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shpmcounter17, CSR_SHPMCOUNTER17, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shpmcounter18, CSR_SHPMCOUNTER18, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shpmcounter19, CSR_SHPMCOUNTER19, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shpmcounter20, CSR_SHPMCOUNTER20, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shpmcounter21, CSR_SHPMCOUNTER21, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shpmcounter22, CSR_SHPMCOUNTER22, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shpmcounter23, CSR_SHPMCOUNTER23, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shpmcounter24, CSR_SHPMCOUNTER24, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shpmcounter25, CSR_SHPMCOUNTER25, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shpmcounter26, CSR_SHPMCOUNTER26, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shpmcounter27, CSR_SHPMCOUNTER27, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shpmcounter28, CSR_SHPMCOUNTER28, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shpmcounter29, CSR_SHPMCOUNTER29, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shpmcounter30, CSR_SHPMCOUNTER30, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(shpmcounter31, CSR_SHPMCOUNTER31, CSR_CLASS_VENDOR_THEAD, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+#endif /* DECLARE_CSR */
diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h
index 4c85ac1..bf3fe6a 100644
--- a/include/opcode/riscv.h
+++ b/include/opcode/riscv.h
@@ -492,6 +492,22 @@ extern const struct riscv_opcode riscv_insn_types[];
 #define NVECR 32
 #define NVECM 1
 
+/* T-HEAD IMM Encoding.  */
+#define EXTRACT_VENDOR_THEAD_IMM(x,nbit,at) \
+  (RV_X(x, at, nbit))
+#define EXTRACT_VENDOR_THEAD_SIGN_IMM(x,nbit,at) \
+  (RV_X(x, at, nbit) | ((-(RV_X(x, (at+nbit-1),1))) << (nbit)))
+
+#define ENCODE_VENDOR_THEAD_IMM(x,nbit,at) \
+  (RV_X(x, 0, nbit) << at)
+#define ENCODE_VENDOR_THEAD_SIGN_IMM(x,nbit,at) \
+  (RV_X(x, 0, nbit) << at)
+
+#define VALID_VENDOR_THEAD_IMM(x,nbit,at) \
+  (EXTRACT_VENDOR_THEAD_IMM(ENCODE_VENDOR_THEAD_IMM(x,nbit,at),nbit,at) == (x))
+#define VALID_VENDOR_THEAD_SIGN_IMM(x,nbit,at) \
+  (EXTRACT_VENDOR_THEAD_SIGN_IMM(ENCODE_VENDOR_THEAD_SIGN_IMM(x,nbit,at),nbit,at) == (x))
+
 /* All RISC-V extended instructions belong to at least one of
    these classes.  */
 enum riscv_extended_insn_class
@@ -505,6 +521,13 @@ enum riscv_extended_insn_class
   INSN_CLASS_D_AND_ZFH,
   INSN_CLASS_Q_AND_ZFH,
   INSN_CLASS_SVINVAL,
+
+  /* INSN class for THEAD.  */
+  INSN_CLASS_THEADC,
+  INSN_CLASS_THEADC_OR_THEADE,
+  INSN_CLASS_THEADC_OR_THEADE_OR_THEADSE,
+  INSN_CLASS_THEADE,
+  INSN_CLASS_THEADSE,
 };
 
 /* This is a list of macro expanded instructions for extended