Make RL78 disassembler and simulator respect ISA for mul/div

[gas]
	* config/rl78-defs.h (rl78_isa_g10): New.
	(rl78_isa_g13): New.
	(rl78_isa_g14): New.
	* config/rl78-parse.y (ISA_G10): New.
	(ISA_G13): New.
	(ISA_G14): New.
	(MULHU, MULH, MULU, DIVHU, DIVWU, MACHU, MACH): Use them.
	* config/tc-rl78.c (rl78_isa_g10): New.
	(rl78_isa_g13): New.
	(rl78_isa_g14): New.

[gdb]
	* rl78-tdep.c (rl78_analyze_prologue): Pass RL78_ISA_DEFAULT to
	rl78_decode_opcode

[include]
	* dis-asm.h (print_insn_rl78_g10): New.
	(print_insn_rl78_g13): New.
	(print_insn_rl78_g14): New.
	(rl78_get_disassembler): New.
	* opcode/rl78.h (RL78_Dis_Isa): New.
	(rl78_decode_opcode): Add ISA parameter.

[opcodes]
	* disassemble.c (disassembler): Choose suitable disassembler based
	on E_ABI.
	* rl78-decode.opc (rl78_decode_opcode): Take ISA parameter.  Use
	it to decode mul/div insns.
	* rl78-decode.c: Regenerate.
	* rl78-dis.c (print_insn_rl78): Rename to...
	(print_insn_rl78_common): ...this, take ISA parameter.
	(print_insn_rl78): New.
	(print_insn_rl78_g10): New.
	(print_insn_rl78_g13): New.
	(print_insn_rl78_g14): New.
	(rl78_get_disassembler): New.

[sim]
	* rl78/cpu.c (g14_multiply): New.
	* rl78/cpu.h (g14_multiply): New.
	* rl78/load.c (rl78_load): Decode ISA completely.
	* rl78/main.c (main): Expand -M to include other ISAs.
	* rl78/rl78.c (decode_opcode): Decode based on ISA.
	* rl78/trace.c (rl78_disasm_fn): New.
	(sim_disasm_init): Reset it.
	(sim_disasm_one): Get correct disassembler for ISA.

4 files changed, 24 insertions, 1 deletions

diff --git a/include/ChangeLog b/include/ChangeLog
index 55bf46d..b9fb84e 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,10 @@
+2015-04-30  DJ Delorie  <dj@redhat.com>
+
+	* dis-asm.h (print_insn_rl78_g10): New.
+	(print_insn_rl78_g13): New.
+	(print_insn_rl78_g14): New.
+	(rl78_get_disassembler): New.
+
 2015-04-17  Richard Earnshaw  <rearnsha@arm.com>
 
 	Merge from gcc:
diff --git a/include/dis-asm.h b/include/dis-asm.h
index 198a6f8..ad060ee 100644
--- a/include/dis-asm.h
+++ b/include/dis-asm.h
@@ -307,9 +307,13 @@ extern int print_insn_z8001		(bfd_vma, disassemble_info *);
 extern int print_insn_z8002		(bfd_vma, disassemble_info *);
 extern int print_insn_rx		(bfd_vma, disassemble_info *);
 extern int print_insn_rl78		(bfd_vma, disassemble_info *);
+extern int print_insn_rl78_g10		(bfd_vma, disassemble_info *);
+extern int print_insn_rl78_g13		(bfd_vma, disassemble_info *);
+extern int print_insn_rl78_g14		(bfd_vma, disassemble_info *);
 
 extern disassembler_ftype arc_get_disassembler (void *);
 extern disassembler_ftype cris_get_disassembler (bfd *);
+extern disassembler_ftype rl78_get_disassembler (bfd *);
 
 extern void print_aarch64_disassembler_options (FILE *);
 extern void print_i386_disassembler_options (FILE *);
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 4a0534f..b5702c5 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,8 @@
+2015-04-30  DJ Delorie  <dj@redhat.com>
+
+	* rl78.h (RL78_Dis_Isa): New.
+	(rl78_decode_opcode): Add ISA parameter.
+
 2015-03-24  Terry Guo  <terry.guo@arm.com>
 
 	* arm.h (arm_feature_set): Extended to provide more available bits.
diff --git a/include/opcode/rl78.h b/include/opcode/rl78.h
index 72adf14..7358d2d 100644
--- a/include/opcode/rl78.h
+++ b/include/opcode/rl78.h
@@ -30,6 +30,13 @@
 extern "C" {
 #endif
 
+typedef enum {
+  RL78_ISA_DEFAULT,
+  RL78_ISA_G10,
+  RL78_ISA_G13,
+  RL78_ISA_G14,
+} RL78_Dis_Isa;
+
 /* For the purposes of these structures, the RL78 registers are as
    follows, despite most of these being memory-mapped and
    bank-switched:  */
@@ -166,7 +173,7 @@ typedef struct
   RL78_Opcode_Operand	op[2];
 } RL78_Opcode_Decoded;
 
-int rl78_decode_opcode (unsigned long, RL78_Opcode_Decoded *, int (*)(void *), void *);
+int rl78_decode_opcode (unsigned long, RL78_Opcode_Decoded *, int (*)(void *), void *, RL78_Dis_Isa);
 
 #ifdef __cplusplus
 }