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authorDenis Chertykov <denisc@overta.ru>2000-06-09 18:02:05 +0000
committerDenis Chertykov <denisc@overta.ru>2000-06-09 18:02:05 +0000
commit60a2978a706c31d9d19436aa3e3db5fa501d74b7 (patch)
tree86e74b4ac95f876536a23179815dacb804b31d8b /include
parent8776c5feceb732ac1a22226d4f841100852dc21d (diff)
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* avr.h: clr,lsl,rol, ... moved after add,adc, ...
Diffstat (limited to 'include')
-rw-r--r--include/opcode/ChangeLog4
-rw-r--r--include/opcode/avr.h10
2 files changed, 9 insertions, 5 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index f7ab54f..e3605e4 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,7 @@
+Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
+
+ * avr.h: clr,lsl,rol, ... moved after add,adc, ...
+
Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
* avr.h: New file with AVR opcodes.
diff --git a/include/opcode/avr.h b/include/opcode/avr.h
index d0ae99c..c5bf49b 100644
--- a/include/opcode/avr.h
+++ b/include/opcode/avr.h
@@ -98,11 +98,6 @@ AVR_INSN (sleep,"", "1001010110001000", 1, AVR_ISA_1200, 0x9588)
AVR_INSN (wdr, "", "1001010110101000", 1, AVR_ISA_1200, 0x95a8)
AVR_INSN (spm, "", "1001010111101000", 1, AVR_ISA_SPM, 0x95e8)
-AVR_INSN (clr, "r=r", "001001rdddddrrrr", 1, AVR_ISA_1200, 0x2400)
-AVR_INSN (lsl, "r=r", "000011rdddddrrrr", 1, AVR_ISA_1200, 0x0c00)
-AVR_INSN (rol, "r=r", "000111rdddddrrrr", 1, AVR_ISA_1200, 0x1c00)
-AVR_INSN (tst, "r=r", "001000rdddddrrrr", 1, AVR_ISA_1200, 0x2000)
-
AVR_INSN (adc, "r,r", "000111rdddddrrrr", 1, AVR_ISA_1200, 0x1c00)
AVR_INSN (add, "r,r", "000011rdddddrrrr", 1, AVR_ISA_1200, 0x0c00)
AVR_INSN (and, "r,r", "001000rdddddrrrr", 1, AVR_ISA_1200, 0x2000)
@@ -116,6 +111,11 @@ AVR_INSN (or, "r,r", "001010rdddddrrrr", 1, AVR_ISA_1200, 0x2800)
AVR_INSN (sbc, "r,r", "000010rdddddrrrr", 1, AVR_ISA_1200, 0x0800)
AVR_INSN (sub, "r,r", "000110rdddddrrrr", 1, AVR_ISA_1200, 0x1800)
+AVR_INSN (clr, "r=r", "001001rdddddrrrr", 1, AVR_ISA_1200, 0x2400)
+AVR_INSN (lsl, "r=r", "000011rdddddrrrr", 1, AVR_ISA_1200, 0x0c00)
+AVR_INSN (rol, "r=r", "000111rdddddrrrr", 1, AVR_ISA_1200, 0x1c00)
+AVR_INSN (tst, "r=r", "001000rdddddrrrr", 1, AVR_ISA_1200, 0x2000)
+
AVR_INSN (andi, "d,M", "0111KKKKddddKKKK", 1, AVR_ISA_1200, 0x7000)
/*XXX special case*/
AVR_INSN (cbr, "d,n", "0111KKKKddddKKKK", 1, AVR_ISA_1200, 0x7000)