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authorFred Fish <fnf@specifix.com>1997-01-19 22:22:01 +0000
committerFred Fish <fnf@specifix.com>1997-01-19 22:22:01 +0000
commit102b9af5f947d4356bbc29f66bc608f372023e63 (patch)
tree471d44d1aa7212051cdd570c8c6d250c5db4c468 /include
parent8fdffbc4b33c081fad2b32f831812a4955b5a9fe (diff)
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* tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
be the destination register.
Diffstat (limited to 'include')
-rw-r--r--include/opcode/ChangeLog5
-rw-r--r--include/opcode/tic80.h3
2 files changed, 7 insertions, 1 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index aaccd06..134e561 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,4 +1,9 @@
start-sanitize-tic80
+Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
+
+ * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
+ be the destination register.
+
Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
* tic80.h (struct tic80_opcode): Change "format" field to "flags".
diff --git a/include/opcode/tic80.h b/include/opcode/tic80.h
index 58d3354..3677438 100644
--- a/include/opcode/tic80.h
+++ b/include/opcode/tic80.h
@@ -187,6 +187,7 @@ extern const struct tic80_operand tic80_operands[];
/* Flag bits for the struct tic80_opcode flags field. */
-#define TIC80_VECTOR 1 /* Is a vector instruction */
+#define TIC80_VECTOR 01 /* Is a vector instruction */
+#define TIC80_NO_R0_DEST 02 /* Register r0 cannot be a destination register */
#endif /* TIC80_H */