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authorPrzemyslaw Wirkus <przemyslaw.wirkus@arm.com>2020-10-28 14:01:36 +0000
committerPrzemyslaw Wirkus <przemyslaw.wirkus@arm.com>2020-10-28 14:05:05 +0000
commitfd195909ce14c7e852319613e7ec6a9a6e7b99ea (patch)
tree86eccb865095b59d49fa9db53ce498befff6cbc1 /include
parent8926e54e3af88740e3872099115e0460ed573d21 (diff)
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aarch64: Add DSB instruction Armv8.7-a variant
This patch adds new variant (nXS) of DSB memory barrier instruction available in Armv8.7-a. New nXS variant has different encoding in comparison with pre Armv8.7-a DSB memory barrier variant thus new instruction and new operand was added. DSB memory nXS barrier variant specifies the limitation on the barrier operation. Allowed values are: DSB SYnXS|#28 DSB ISHnXS|#24 DSB NSHnXS|#20 DSB OSHnXS|#16 Please note that till now, for barriers, barrier operation was encoded in 4-bit unsigned immediate CRm field (in the range 0 to 15). For DSB memory nXS barrier variant, barrier operation is a 5-bit unsigned assembly instruction immediate, encoded in instruction in two bits CRm<3:2>: CRm<3:2> #imm 00 16 01 20 10 24 11 28 This patch extends current AArch64 barrier instructions with above mapping. Notable patch changes include: + New DSB memory barrier variant encoding for Armv8.7-a. + New operand BARRIER_DSB_NXS for above instruction in order to distinguish between existing and new DSB instruction flavour. + New set of DSB nXS barrier options. + New instruction inserter and extractor map between instruction immediate 5-bit value and 2-bit CRm field of the instruction itself (see FLD_CRm_dsb_nxs). + Regeneration of aarch64-[asm|dis|opc]-2.c files. + Test cases to cover new instruction assembling and disassembling. For more details regarding DSB memory barrier instruction and its Armv8.7-a flavour please refer to Arm A64 Instruction set documentation for Armv8-A architecture profile, see document pages 132-133 of [0]. [0]: https://developer.arm.com/docs/ddi0596/i gas/ChangeLog: 2020-10-23 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> * NEWS: Docs update. * config/tc-aarch64.c (parse_operands): Add AARCH64_OPND_BARRIER_DSB_NXS handler. (md_begin): Add content of aarch64_barrier_dsb_nxs_options to aarch64_barrier_opt_hsh hash. * testsuite/gas/aarch64/system-4-invalid.d: New test. * testsuite/gas/aarch64/system-4-invalid.l: New test. * testsuite/gas/aarch64/system-4-invalid.s: New test. * testsuite/gas/aarch64/system-4.d: New test. * testsuite/gas/aarch64/system-4.s: New test. include/ChangeLog: 2020-10-23 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> * opcode/aarch64.h (enum aarch64_opnd): New operand AARCH64_OPND_BARRIER_DSB_NXS. (aarch64_barrier_dsb_nxs_options): Declare DSB nXS options. opcodes/ChangeLog: 2020-10-23 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> * aarch64-asm.c (aarch64_ins_barrier_dsb_nxs): New inserter. * aarch64-asm.h (AARCH64_DECL_OPD_INSERTER): New inserter ins_barrier_dsb_nx. * aarch64-dis.c (aarch64_ext_barrier_dsb_nxs): New extractor. * aarch64-dis.h (AARCH64_DECL_OPD_EXTRACTOR): New extractor ext_barrier_dsb_nx. * aarch64-opc.c (aarch64_print_operand): New options table aarch64_barrier_dsb_nxs_options. * aarch64-opc.h (enum aarch64_field_kind): New field name FLD_CRm_dsb_nxs. * aarch64-tbl.h (struct aarch64_opcode): Define DSB nXS barrier Armv8.7-a instruction. * aarch64-asm-2.c: Regenerated. * aarch64-dis-2.c: Regenerated. * aarch64-opc-2.c: Regenerated.
Diffstat (limited to 'include')
-rw-r--r--include/opcode/aarch64.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index a5f9e71..6ddcaf9 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -317,6 +317,7 @@ enum aarch64_opnd
AARCH64_OPND_SYSREG_TLBI, /* System register <tlbi_op> operand. */
AARCH64_OPND_SYSREG_SR, /* System register RCTX operand. */
AARCH64_OPND_BARRIER, /* Barrier operand. */
+ AARCH64_OPND_BARRIER_DSB_NXS, /* Barrier operand for DSB nXS variant. */
AARCH64_OPND_BARRIER_ISB, /* Barrier operand for ISB. */
AARCH64_OPND_PRFOP, /* Prefetch operation. */
AARCH64_OPND_BARRIER_PSB, /* Barrier operand for PSB. */
@@ -949,6 +950,7 @@ struct aarch64_name_value_pair
extern const struct aarch64_name_value_pair aarch64_operand_modifiers [];
extern const struct aarch64_name_value_pair aarch64_barrier_options [16];
+extern const struct aarch64_name_value_pair aarch64_barrier_dsb_nxs_options [4];
extern const struct aarch64_name_value_pair aarch64_prfops [32];
extern const struct aarch64_name_value_pair aarch64_hint_options [];