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| author | Yufeng Zhang <yufeng.zhang@arm.com> | 2013-11-05 20:50:18 +0000 |
|---|---|---|
| committer | Yufeng Zhang <yufeng.zhang@arm.com> | 2013-11-05 20:50:18 +0000 |
| commit | 68a642838267d9971f77f9eb487d32044a499c82 (patch) | |
| tree | 9687f65166a0f885332088bec9166d438007c5d3 /include | |
| parent | 4e50d5f863090d22db5ce0ec1e7d9e075806fd91 (diff) | |
| download | gdb-68a642838267d9971f77f9eb487d32044a499c82.zip gdb-68a642838267d9971f77f9eb487d32044a499c82.tar.gz gdb-68a642838267d9971f77f9eb487d32044a499c82.tar.bz2 | |
gas/
* config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_COND1.
gas/testsuite/
* gas/aarch64/alias.s: Add tests.
* gas/aarch64/alias.d: Update.
* gas/aarch64/no-aliases.d: Update.
* gas/aarch64/diagnostic.s: Add tests.
* gas/aarch64/diagnostic.l: Update.
* gas/aarch64/illegal.s: Add tests.
* gas/aarch64/illegal.l: Update.
include/opcode/
* aarch64.h (enum aarch64_operand_class): Add AARCH64_OPND_CLASS_COND.
(enum aarch64_opnd): Add AARCH64_OPND_COND1.
opcodes/
* aarch64-dis.c (convert_ubfm_to_lsl): Check for cond != '111x'.
(convert_from_csel): Likewise.
* aarch64-opc.c (operand_general_constraint_met_p): Handle
AARCH64_OPND_CLASS_COND and AARCH64_OPND_COND1.
(aarch64_print_operand): Handle AARCH64_OPND_COND1.
* aarch64-tbl.h (aarch64_opcode_table): Use COND1 instead of
COND for cinc, cset, cinv, csetm and cneg.
(AARCH64_OPERANDS): Add entry for AARCH64_OPND_COND1.
* aarch64-asm-2.c: Re-generated.
* aarch64-dis-2.c: Ditto.
* aarch64-opc-2.c: Ditto.
Diffstat (limited to 'include')
| -rw-r--r-- | include/opcode/ChangeLog | 5 | ||||
| -rw-r--r-- | include/opcode/aarch64.h | 2 |
2 files changed, 7 insertions, 0 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index f645a7e..50de99f 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,8 @@ +2013-11-05 Yufeng Zhang <yufeng.zhang@arm.com> + + * aarch64.h (enum aarch64_operand_class): Add AARCH64_OPND_CLASS_COND. + (enum aarch64_opnd): Add AARCH64_OPND_COND1. + 2013-10-14 Chao-ying Fu <Chao-ying.Fu@imgtec.com> * mips.h (mips_operand_type): Add OP_IMM_INDEX and OP_REG_INDEX. diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index eaf3cda..b45f8c0 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -85,6 +85,7 @@ enum aarch64_operand_class AARCH64_OPND_CLASS_ADDRESS, AARCH64_OPND_CLASS_IMMEDIATE, AARCH64_OPND_CLASS_SYSTEM, + AARCH64_OPND_CLASS_COND, }; /* Operand code that helps both parsing and coding. @@ -168,6 +169,7 @@ enum aarch64_opnd AARCH64_OPND_IMM_MOV, /* Immediate operand for the MOV alias. */ AARCH64_OPND_COND, /* Standard condition as the last operand. */ + AARCH64_OPND_COND1, /* Same as the above, but excluding AL and NV. */ AARCH64_OPND_ADDR_ADRP, /* Memory address for ADRP */ AARCH64_OPND_ADDR_PCREL14, /* 14-bit PC-relative address for e.g. TBZ. */ |