[PowerPC VLE] Add SPE2 and EFS2 instructions support

include/
	* opcode/ppc.h:
	(spe2_opcodes, spe2_num_opcodes): New.
	(PPC_OPCODE_SPE2): New define.
	(PPC_OPCODE_EFS2): Likewise.
	(SPE2_XOP): Likewise.
	(SPE2_XOP_TO_SEG): Likewise.
opcodes/
	* ppc-dis.c (ppc_mopt): Add PPC_OPCODE_SPE2 and
	PPC_OPCODE_EFS2 flag to "e200z4" entry.
	New entries efs2 and spe2.
	Add PPC_OPCODE_SPE2 and PPC_OPCODE_EFS2 flag to "vle" entry.
	(SPE2_OPCD_SEGS): New macro.
	(spe2_opcd_indices): New.
	(disassemble_init_powerpc): Handle SPE2 opcodes.
	(lookup_spe2): New function.
	(print_insn_powerpc): call lookup_spe2.
	* ppc-opc.c (insert_evuimm1_ex0): New function.
	(extract_evuimm1_ex0): Likewise.
	(insert_evuimm_lt8): Likewise.
	(extract_evuimm_lt8): Likewise.
	(insert_off_spe2): Likewise.
	(extract_off_spe2): Likewise.
	(insert_Ddd): Likewise.
	(extract_Ddd): Likewise.
	(DD): New operand.
	(EVUIMM_LT8): Likewise.
	(EVUIMM_LT16): Adjust.
	(MMMM): New operand.
	(EVUIMM_1): Likewise.
	(EVUIMM_1_EX0): Likewise.
	(EVUIMM_2): Adjust.
	(NNN): New operand.
	(VX_OFF_SPE2): Likewise.
	(BBB): Likewise.
	(DDD): Likewise.
	(VX_MASK_DDD): New mask.
	(HH): New operand.
	(VX_RA_CONST): New macro.
	(VX_RA_CONST_MASK): Likewise.
	(VX_RB_CONST): Likewise.
	(VX_RB_CONST_MASK): Likewise.
	(VX_OFF_SPE2_MASK): Likewise.
	(VX_SPE_CRFD): Likewise.
	(VX_SPE_CRFD_MASK VX): Likewise.
	(VX_SPE2_CLR): Likewise.
	(VX_SPE2_CLR_MASK): Likewise.
	(VX_SPE2_SPLATB): Likewise.
	(VX_SPE2_SPLATB_MASK): Likewise.
	(VX_SPE2_OCTET): Likewise.
	(VX_SPE2_OCTET_MASK): Likewise.
	(VX_SPE2_DDHH): Likewise.
	(VX_SPE2_DDHH_MASK): Likewise.
	(VX_SPE2_HH): Likewise.
	(VX_SPE2_HH_MASK): Likewise.
	(VX_SPE2_EVMAR): Likewise.
	(VX_SPE2_EVMAR_MASK): Likewise.
	(PPCSPE2): Likewise.
	(PPCEFS2): Likewise.
	(vle_opcodes): Add EFS2 and some missing SPE opcodes.
	(powerpc_macros): Map old SPE instructions have new names
	with the same opcodes. Add SPE2 instructions which just are
	mapped to SPE2.
	(spe2_opcodes): Add SPE2 opcodes.
gas/
	* config/tc-ppc.c:
	(md_parse_option): Add mspe2 switch.
	(md_show_usage): Document -mspe2.
	(ppc_setup_opcodes): Handle spe2_opcodes.
	* doc/as.texinfo: Document -mspe2.
	* doc/c-ppc.texi: Likewise.
	* testsuite/gas/ppc/efs.d: New file.
	* testsuite/gas/ppc/efs.s: Likewise.
	* testsuite/gas/ppc/efs2.d: Likewise.
	* testsuite/gas/ppc/efs2.s: Likewise.
	* testsuite/gas/ppc/ppc.exp: Run new tests.
	* testsuite/gas/ppc/spe.d: New file.
	* testsuite/gas/ppc/spe.s: Likewise.
	* testsuite/gas/ppc/spe2-checks.d: Likewise.
	* testsuite/gas/ppc/spe2-checks.l: Likewise.
	* testsuite/gas/ppc/spe2-checks.s: Likewise.
	* testsuite/gas/ppc/spe2.d: Likewise.
	* testsuite/gas/ppc/spe2.s: Likewise.
	* testsuite/gas/ppc/spe_ambiguous.d: Likewise.
	* testsuite/gas/ppc/spe_ambiguous.s: Likewise.

2 files changed, 24 insertions, 0 deletions

diff --git a/include/ChangeLog b/include/ChangeLog
index 3b89deb..d914f71 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,13 @@
+2017-08-23  Alexander Fedotov <alexander.fedotov@nxp.com>
+	    Edmar Wienskoski <edmar.wienskoski@nxp.com>
+
+	* opcode/ppc.h:
+	(spe2_opcodes, spe2_num_opcodes): New.
+	(PPC_OPCODE_SPE2): New define.
+	(PPC_OPCODE_EFS2): Likewise.
+	(SPE2_XOP): Likewise.
+	(SPE2_XOP_TO_SEG): Likewise.
+
 2017-08-23  Jan Kratochvil  <jan.kratochvil@redhat.com>
 
 	* gcc-interface.h (enum gcc_base_api_version): Update comment for
diff --git a/include/opcode/ppc.h b/include/opcode/ppc.h
index 21b1221..a8274e1 100644
--- a/include/opcode/ppc.h
+++ b/include/opcode/ppc.h
@@ -70,6 +70,8 @@ extern const struct powerpc_opcode powerpc_opcodes[];
 extern const int powerpc_num_opcodes;
 extern const struct powerpc_opcode vle_opcodes[];
 extern const int vle_num_opcodes;
+extern const struct powerpc_opcode spe2_opcodes[];
+extern const int spe2_num_opcodes;
 
 /* Values defined for the flags field of a struct powerpc_opcode.  */
 
@@ -218,6 +220,12 @@ extern const int vle_num_opcodes;
 /* Opcode is supported by PowerPC LSP */
 #define PPC_OPCODE_LSP	     0x80000000000ull
 
+/* Opcode is only supported by Freescale SPE2 APU.  */
+#define PPC_OPCODE_SPE2	    0x100000000000ull
+
+/* Opcode is supported by EFS2.  */
+#define PPC_OPCODE_EFS2	    0x200000000000ull
+
 /* A macro to extract the major opcode from an instruction.  */
 #define PPC_OP(i) (((i) >> 26) & 0x3f)
 
@@ -229,6 +237,12 @@ extern const int vle_num_opcodes;
 
 /* A macro to convert a VLE opcode to a VLE opcode segment.  */
 #define VLE_OP_TO_SEG(i) ((i) >> 1)
+
+/* A macro to extract the extended opcode from a SPE2 instruction.  */
+#define SPE2_XOP(i) ((i) & 0x7ff)
+
+/* A macro to convert a SPE2 extended opcode to a SPE2 xopcode segment.  */
+#define SPE2_XOP_TO_SEG(i) ((i) >> 7)
 
 /* The operands table is an array of struct powerpc_operand.  */