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| author | Georg-Johann Lay <avr@gjlay.de> | 2017-06-30 16:37:39 +0100 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2017-06-30 16:37:39 +0100 |
| commit | 32f76c677333510350f21a40db062a8d17995c53 (patch) | |
| tree | e0471d427aaed0ea30d3ce0044a55cc5c95a1816 /include | |
| parent | 33f466961ce01a7db6dbec6b39aafb7af1855645 (diff) | |
| download | gdb-32f76c677333510350f21a40db062a8d17995c53.zip gdb-32f76c677333510350f21a40db062a8d17995c53.tar.gz gdb-32f76c677333510350f21a40db062a8d17995c53.tar.bz2 | |
Add support for a __gcc_isr pseudo isntruction to the AVR assembler.
PR gas/21683
include * opcode/avr.h (AVR_INSN): Add one for __gcc_isr.
gas * doc/c-avr.texi (AVR Options) <-mgcc-isr>: Document it.
(AVR Pseudo Instructions): New node.
* config/tc-avr.h (md_pre_output_hook): Define to avr_pre_output_hook.
(md_undefined_symbol): Define to avr_undefined_symbol.
(avr_pre_output_hook, avr_undefined_symbol): New protos.
* config/tc-avr.c (struc-symbol.h): Include it.
(ISR_CHUNK_Done, ISR_CHUNK_Prologue, ISR_CHUNK_Epilogue): New enums.
(avr_isr, avr_gccisr_opcode)
(avr_no_sreg_hash, avr_no_sreg): New static variables.
(avr_opt_s) <have_gccisr>: Add field.
(avr_opt): Add initializer for have_gccisr.
(enum options) <OPTION_HAVE_GCCISR>: Add enum.
(md_longopts) <"mgcc-isr">: Add entry.
(md_show_usage): Document -mgcc-isr.
(md_parse_option) [OPTION_HAVE_GCCISR]: Handle it.
(md_undefined_symbol): Remove.
(avr_undefined_symbol, avr_pre_output_hook): New fuctions.
(md_begin) <avr_no_sreg_hash, avr_gccisr_opcode>: Initialize them.
(avr_operand) <pregno>: Add argument and set *pregno if function
is called for a register constraint.
[N]: Handle constraint.
(avr_operands) <avr_operand>: Pass 5th parameter to calls.
[avr_opt.have_gccisr]: Call avr_update_gccisr. Call
avr_gccisr_operands instead of avr_operands.
(avr_update_gccisr, avr_emit_insn, avr_patch_gccisr_frag)
(avr_gccisr_operands, avr_check_gccisr_done): New static functions.
* testsuite/gas/avr/gccisr-01.d: New test.
* testsuite/gas/avr/gccisr-01.s: New test.
* testsuite/gas/avr/gccisr-02.d: New test.
* testsuite/gas/avr/gccisr-02.s: New test.
* testsuite/gas/avr/gccisr-03.d: New test.
* testsuite/gas/avr/gccisr-03.s: New test.
Diffstat (limited to 'include')
| -rw-r--r-- | include/ChangeLog | 5 | ||||
| -rw-r--r-- | include/opcode/avr.h | 5 |
2 files changed, 10 insertions, 0 deletions
diff --git a/include/ChangeLog b/include/ChangeLog index b940504..9400f16 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,8 @@ +2017-06-30 Georg-Johann Lay <avr@gjlay.de> + + PR gas/21683 + * opcode/avr.h (AVR_INSN): Add one for __gcc_isr. + 2017-06-30 Maciej W. Rozycki <macro@imgtec.com> Andrew Bennett <andrew.bennett@imgtec.com> diff --git a/include/opcode/avr.h b/include/opcode/avr.h index 1c73022..2212816 100644 --- a/include/opcode/avr.h +++ b/include/opcode/avr.h @@ -110,6 +110,7 @@ z - Z pointer register (for [e]lpm Rd,Z[+]) M - immediate value from 0 to 255 n - immediate value from 0 to 255 ( n = ~M ). Relocation impossible + N - immediate value from 0 to 255. Relocation impossible s - immediate value from 0 to 7 P - Port address value from 0 to 63. (in, out) p - Port address value from 0 to 31. (cbi, sbi, sbic, sbis) @@ -306,3 +307,7 @@ AVR_INSN (eijmp, "", "1001010000011001", 1, AVR_ISA_EIND, 0x9419) /* DES instruction for encryption and decryption. */ AVR_INSN (des, "E", "10010100EEEE1011", 1, AVR_ISA_DES, 0x940B) +/* Operands are evaluated by hand and won't pop new fux-ups. + The pseudo-insn is hidden behind NOP so that avr-dis.c don't see it. */ +AVR_INSN (__gcc_isr, "", "0000000000000000", 1, AVR_ISA_1200, 0x0) + |