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authorNick Clifton <nickc@redhat.com>2001-02-18 23:33:11 +0000
committerNick Clifton <nickc@redhat.com>2001-02-18 23:33:11 +0000
commite135f41bc2c2080a18ec4458a05757e1dc824876 (patch)
tree2b4c79d6629d37f6511d95efe4bdb75d1054736d /include
parentdc3febfa6ef6fa1bc6a9239f85db6faf6006655c (diff)
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Add PDP-11 support
Diffstat (limited to 'include')
-rw-r--r--include/ChangeLog4
-rw-r--r--include/dis-asm.h1
-rw-r--r--include/opcode/ChangeLog12
-rw-r--r--include/opcode/pdp11.h78
4 files changed, 91 insertions, 4 deletions
diff --git a/include/ChangeLog b/include/ChangeLog
index fa7af4b..11eacd9 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,7 @@
+2001-02-18 lars brinkhoff <lars@nocrew.org>
+
+ * dis-asm.h: Add PDP-11 target.
+
2001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
* dis-asm.h: Add linux target for S/390.
diff --git a/include/dis-asm.h b/include/dis-asm.h
index 6e3e3b5..1cc3fce 100644
--- a/include/dis-asm.h
+++ b/include/dis-asm.h
@@ -192,6 +192,7 @@ extern int print_insn_mcore PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_mn10200 PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_mn10300 PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_ns32k PARAMS ((bfd_vma, disassemble_info*));
+extern int print_insn_pdp11 PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_big_powerpc PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_little_powerpc PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_rs6000 PARAMS ((bfd_vma, disassemble_info*));
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 66c3875..b4e6888 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,4 +1,8 @@
-Mon Feb 12 17:40:54 CET 2001 Jan Hubicka <jh@suse.cz>
+2001-02-18 lars brinkhoff <lars@nocrew.org>
+
+ * pdp11.h: New file.
+
+2001-02-12 Jan Hubicka <jh@suse.cz>
* i386.h (i386_optab): SSE integer converison instructions have
64bit versions on x86-64.
@@ -29,7 +33,7 @@ Mon Feb 12 17:40:54 CET 2001 Jan Hubicka <jh@suse.cz>
(pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
Remove duplicate "ldw j(s,b),x". Sort some entries.
-Sat Jan 13 09:56:32 MET 2001 Jan Hubicka <jh@suse.cz>
+2001-01-13 Jan Hubicka <jh@suse.cz>
* i386.h (i386_optab): Fix pusha and ret templates.
@@ -676,7 +680,7 @@ Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
* cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
CGEN_MODE_UINT.
-Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
+1999-01-16 Jeffrey A Law (law@cygnus.com)
* hppa.h (bv): Fix mask.
@@ -1027,7 +1031,7 @@ Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
* tic30.h: New file.
-Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
+Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
* cgen.h: Add prototypes for cgen_save_fixups(),
cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
diff --git a/include/opcode/pdp11.h b/include/opcode/pdp11.h
new file mode 100644
index 0000000..891b74f9
--- /dev/null
+++ b/include/opcode/pdp11.h
@@ -0,0 +1,78 @@
+/* PDP-11 opcde list.
+ Copyright (C) 2001 Free Software Foundation, Inc.
+
+This file is part of GDB and GAS.
+
+GDB and GAS are free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 1, or (at your option)
+any later version.
+
+GDB and GAS are distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GDB or GAS; see the file COPYING. If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+/*
+ * PDP-11 opcode types.
+ */
+
+#define PDP11_OPCODE_NO_OPS 0
+#define PDP11_OPCODE_REG 1 /* register */
+#define PDP11_OPCODE_OP 2 /* generic operand */
+#define PDP11_OPCODE_REG_OP 3 /* register and generic operand */
+#define PDP11_OPCODE_REG_OP_REV 4 /* register and generic operand,
+ reversed syntax */
+#define PDP11_OPCODE_AC_OP 5 /* fpu accumulator and generic
+ operand */
+#define PDP11_OPCODE_OP_OP 6 /* two generic operands */
+#define PDP11_OPCODE_DISPL 7 /* pc-relative displacement */
+#define PDP11_OPCODE_REG_DISPL 8 /* redister and pc-relative
+ displacement */
+#define PDP11_OPCODE_IMM8 9 /* 8-bit immediate */
+#define PDP11_OPCODE_IMM6 10 /* 6-bit immediate */
+#define PDP11_OPCODE_IMM3 11 /* 3-bit immediate */
+#define PDP11_OPCODE_ILLEGAL 12 /* illegal instruction */
+
+/*
+ * PDP-11 instruction set extensions.
+ *
+ * Please keep the numbers low, as they are used as indices into
+ * an array.
+ */
+
+#define PDP11_NONE 0 /* not in instruction set */
+#define PDP11_BASIC 1 /* basic instruction set (11/20 etc) */
+#define PDP11_CSM 2 /* commercial instruction set */
+#define PDP11_CIS 3 /* commercial instruction set */
+#define PDP11_EIS 4 /* extended instruction set (11/45 etc) */
+#define PDP11_FIS 5 /* KEV11 floating-point instructions */
+#define PDP11_FPP 6 /* FP-11 floating-point instructions */
+#define PDP11_LEIS 7 /* limited extended instruction set
+ (11/40 etc) */
+#define PDP11_MFPT 8 /* move from processor type */
+#define PDP11_MPROC 9 /* multiprocessor instructions: tstset,
+ wrtlck */
+#define PDP11_MXPS 10 /* move from/to processor status */
+#define PDP11_SPL 11 /* set priority level */
+#define PDP11_UCODE 12 /* microcode instructions: ldub, med, xfc */
+#define PDP11_EXT_NUM 13 /* total number of extension types */
+
+struct pdp11_opcode
+{
+ const char *name;
+ int opcode;
+ int mask;
+ int type;
+ int extension;
+};
+
+extern const struct pdp11_opcode pdp11_opcodes[];
+extern const struct pdp11_opcode pdp11_aliases[];
+extern const int pdp11_num_opcodes, pdp11_num_aliases;
+
+/* end of pdp11.h */