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| author | Claudiu Zissulescu <claziss@synopsys.com> | 2016-04-05 17:37:29 +0200 |
|---|---|---|
| committer | Claudiu Zissulescu <claziss@synopsys.com> | 2016-04-05 17:37:45 +0200 |
| commit | 8ddf6b2a1384ca73a16827022da5f4423703154a (patch) | |
| tree | a55da1754e6f171faa26bf3d89df048b9d4d3c9c /include | |
| parent | 1e5885b72e20ef874f526e77a4946b2655e6d3c3 (diff) | |
| download | gdb-8ddf6b2a1384ca73a16827022da5f4423703154a.zip gdb-8ddf6b2a1384ca73a16827022da5f4423703154a.tar.gz gdb-8ddf6b2a1384ca73a16827022da5f4423703154a.tar.bz2 | |
[ARC] Fix support for double assist instructions.
opcodes/
2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
* arc-regs.h: Add a new subclass field. Add double assist
accumulator register values.
* arc-tbl.h: Use DPA subclass to mark the double assist
instructions. Use DPX/SPX subclas to mark the FPX instructions.
* arc-opc.c (RSP): Define instead of SP.
(arc_aux_regs): Add the subclass field.
include/
2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
* opcode/arc.h (DPA, DPX, SPX): New subclass enums.
(ARC_FPUDA): Define.
(arc_aux_reg): Add new field.
gas/
2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
* config/tc-arc.c (is_code_density_p): Compare directly the
subclass field.
(is_spfp_p, is_dpfp_p, is_spfp_p): Define.
(check_cpu_feature): New function.
(find_opcode_match): Use check_cpu_feature function.
(preprocess_operands): Likewise.
(md_parse_option): Use mfpuda, mdpfp, mspfp options.
* testsuite/gas/arc/tdpfp.d: New file.
* testsuite/gas/arc/tfpuda.d: Likewise.
* testsuite/gas/arc/tfpx.s: Likewise.
Diffstat (limited to 'include')
| -rw-r--r-- | include/ChangeLog | 8 | ||||
| -rw-r--r-- | include/opcode/arc.h | 11 |
2 files changed, 16 insertions, 3 deletions
diff --git a/include/ChangeLog b/include/ChangeLog index 755c014..4b2215f 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,4 +1,10 @@ -2016-04-05 Cupertino Miranda <cmiranda@synopsys.com> +22016-04-05 Claudiu Zissulescu <claziss@synopsys.com> + + * opcode/arc.h (DPA, DPX, SPX): New subclass enums. + (ARC_FPUDA): Define. + (arc_aux_reg): Add new field. + +016-04-05 Cupertino Miranda <cmiranda@synopsys.com> * opcode/arc-func.h (replace_bits24): Changed. (replace_bits24_be): Created. diff --git a/include/opcode/arc.h b/include/opcode/arc.h index 5bbf5d4..bc0e1ad 100644 --- a/include/opcode/arc.h +++ b/include/opcode/arc.h @@ -59,6 +59,8 @@ typedef enum CD2, DIV, DP, + DPA, + DPX, MPY1E, MPY6E, MPY7E, @@ -68,7 +70,8 @@ typedef enum SHFT1, SHFT2, SWAP, - SP + SP, + SPX } insn_subclass_t; /* Flags class. */ @@ -148,6 +151,7 @@ extern const unsigned arc_num_opcodes; #define ARC_DPFP 0x0010 #define ARC_SPFP 0x0020 #define ARC_FPU 0x0030 +#define ARC_FPUDA 0x0040 /* NORM & SWAP. */ #define ARC_SWAP 0x0100 @@ -403,7 +407,10 @@ struct arc_aux_reg /* Register address. */ int address; - /* Register name. */ + /* AUX register subclass. */ + insn_subclass_t subclass; + + /* Register name. */ const char *name; /* Size of the string. */ |