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authorThiemo Seufer <ths@networkno.de>2008-11-28 18:02:17 +0000
committerThiemo Seufer <ths@networkno.de>2008-11-28 18:02:17 +0000
commit3aa3176b2dea5796ab968b289804eced655f07ee (patch)
treead2039e6910f4951a98b3def13d245d7197b2638 /include
parent6fce36a432ae0879f863bd5d942ae17a5e36d297 (diff)
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* aoutx.h (NAME): Add case statements for bfd_mach_mips14000,
bfd_mach_mips16000. * archures.c (bfd_architecture): Add .#defines for bfd_mach_mips14000, bfd_mach_mips16000. * bfd-in2.h: Regenerate. * cpu-mips.c: Add enums I_mips14000, I_mips16000. (arch_info_struct): Add refs to R14000, R16000. * elfxx-mips.c (mips_set_isa_flags): Handle bfd_mach_mips14000, bfd_mach_mips16000. (mips_mach_extensions): Map R14000, R16000 to R10000. * config/tc-mips.c (hilo_interlocks): Handle CPU_R14000, CPU_R16000. (mips_cpu_info_table): Add r14000, r16000. * doc/c-mips.texi: Add entries for 14000, 16000. * mips-dis.c (mips_arch_choices): Add r14000, r16000. * mips.h: Define CPU_R14000, CPU_R16000. (OPCODE_IS_MEMBER): Include R14000, R16000 in test.
Diffstat (limited to 'include')
-rw-r--r--include/opcode/ChangeLog5
-rw-r--r--include/opcode/mips.h5
2 files changed, 9 insertions, 1 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index b64a8b6..bda9ca1 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,8 @@
+2008-11-28 Joshua Kinard <kumba@gentoo.org>
+
+ * mips.h: Define CPU_R14000, CPU_R16000.
+ (OPCODE_IS_MEMBER): Include R14000, R16000 in test.
+
2008-11-18 Catherine Moore <clm@codesourcery.com>
* arm.h (FPU_NEON_FP16): New.
diff --git a/include/opcode/mips.h b/include/opcode/mips.h
index 9af9ea1..e7cfdb9 100644
--- a/include/opcode/mips.h
+++ b/include/opcode/mips.h
@@ -632,6 +632,8 @@ static const unsigned int mips_isa_table[] =
#define CPU_RM9000 9000
#define CPU_R10000 10000
#define CPU_R12000 12000
+#define CPU_R14000 14000
+#define CPU_R16000 16000
#define CPU_MIPS16 16
#define CPU_MIPS32 32
#define CPU_MIPS32R2 33
@@ -661,7 +663,8 @@ static const unsigned int mips_isa_table[] =
|| (cpu == CPU_R4010 && ((insn)->membership & INSN_4010) != 0) \
|| (cpu == CPU_VR4100 && ((insn)->membership & INSN_4100) != 0) \
|| (cpu == CPU_R3900 && ((insn)->membership & INSN_3900) != 0) \
- || ((cpu == CPU_R10000 || cpu == CPU_R12000) \
+ || ((cpu == CPU_R10000 || cpu == CPU_R12000 || cpu == CPU_R14000 \
+ || cpu == CPU_R16000) \
&& ((insn)->membership & INSN_10000) != 0) \
|| (cpu == CPU_SB1 && ((insn)->membership & INSN_SB1) != 0) \
|| (cpu == CPU_R4111 && ((insn)->membership & INSN_4111) != 0) \