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| author | Nick Clifton <nickc@redhat.com> | 2000-12-02 01:10:33 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2000-12-02 01:10:33 +0000 |
| commit | c6c98b3833d01c45200708006011e5cecd461fac (patch) | |
| tree | c07dc1c4a235bd50c648bec5d6adbc70a0c844ef /include | |
| parent | 84ea6cf2c5170547163a4bf09ac2bbb3cd424685 (diff) | |
| download | gdb-c6c98b3833d01c45200708006011e5cecd461fac.zip gdb-c6c98b3833d01c45200708006011e5cecd461fac.tar.gz gdb-c6c98b3833d01c45200708006011e5cecd461fac.tar.bz2 | |
Add MIPS SB1 machine
Diffstat (limited to 'include')
| -rw-r--r-- | include/elf/ChangeLog | 2 | ||||
| -rw-r--r-- | include/elf/mips.h | 1 | ||||
| -rw-r--r-- | include/opcode/ChangeLog | 2 | ||||
| -rw-r--r-- | include/opcode/mips.h | 5 |
4 files changed, 8 insertions, 2 deletions
diff --git a/include/elf/ChangeLog b/include/elf/ChangeLog index 7c6b94e..2251ba0 100644 --- a/include/elf/ChangeLog +++ b/include/elf/ChangeLog @@ -6,6 +6,8 @@ * mips.h (E_MIPS_ARCH_5, E_MIPS_ARCH_64): New definitions. + * mips.h (E_MIPS_MACH_SB1): New constant. + 2000-11-30 Jan Hubicka <jh@suse.cz> * common.h (EM_X86_64): New macro. diff --git a/include/elf/mips.h b/include/elf/mips.h index ec333bf..bfa03f1 100644 --- a/include/elf/mips.h +++ b/include/elf/mips.h @@ -163,6 +163,7 @@ END_RELOC_NUMBERS (R_MIPS_maxext) #define E_MIPS_MACH_4650 0x00850000 #define E_MIPS_MACH_4111 0x00880000 #define E_MIPS_MACH_MIPS32_4K 0x00890000 +#define E_MIPS_MACH_SB1 0x008a0000 /* Processor specific section indices. These sections do not actually exist. Symbols with a st_shndx field corresponding to one of these diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 798d303..e1a3b29 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -28,6 +28,8 @@ * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New definitions. + * mips.h (CPU_SB1): New constant. + 2000-10-20 Jakub Jelinek <jakub@redhat.com> * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B. diff --git a/include/opcode/mips.h b/include/opcode/mips.h index bd8f023..af6c66c 100644 --- a/include/opcode/mips.h +++ b/include/opcode/mips.h @@ -359,9 +359,10 @@ struct mips_opcode #define CPU_R10000 10000 #define CPU_MIPS16 16 #define CPU_MIPS32 32 -#define CPU_MIPS32_4K 3204113 /* 32, 04, octal 'K' */ +#define CPU_MIPS32_4K 3204113 /* 32, 04, octal 'K'. */ #define CPU_MIPS5 5 #define CPU_MIPS64 64 +#define CPU_SB1 12310201 /* octal 'SB', 01. */ /* Test for membership in an ISA including chip specific ISAs. INSN is pointer to an element of the opcode table; ISA is the @@ -369,7 +370,7 @@ struct mips_opcode to test, or zero if no CPU specific ISA test is desired. The gp32 arg is set when you need to force 32-bit register usage on a machine with 64-bit registers; see the documentation under -mgp32 - in the MIPS gas docs. */ + in the MIPS gas docs. */ #define OPCODE_IS_MEMBER(insn, isa, cpu, gp32) \ ((((insn)->membership & isa) != 0 \ |