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authorIan Lance Taylor <ian@airs.com>1997-05-05 16:46:18 +0000
committerIan Lance Taylor <ian@airs.com>1997-05-05 16:46:18 +0000
commit654b08453944a65e47f58cf1cad92d22bac7f5ac (patch)
treefc42293178b481a21988f13fa7496a4ce69374c6 /include
parent7a418800c16e72cc1f902ad19e0e81d1a6d66576 (diff)
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Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
* i386.h: Remove W modifier from conditional move instructions.
Diffstat (limited to 'include')
-rw-r--r--include/opcode/ChangeLog10
-rw-r--r--include/opcode/i386.h48
2 files changed, 36 insertions, 22 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 417b139..accc90a 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,13 @@
+Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
+
+ * i386.h: Remove W modifier from conditional move instructions.
+
+Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
+
+ * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
+ with no arguments to match that generated by the UnixWare
+ assembler.
+
Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
* cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
diff --git a/include/opcode/i386.h b/include/opcode/i386.h
index 0d44de7..1ee5a03 100644
--- a/include/opcode/i386.h
+++ b/include/opcode/i386.h
@@ -20,8 +20,8 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
/* The NON_BROKEN_OPCODES cases use the operands in the reverse order
from that documented in the Intel manuals. The opcode values are
such that they actually generate different instructions. These
- values must not be changed, as existing code depends upon the
- arguably erroneous behaviour. */
+ values must not be changed, as they are the values generated by the
+ UnixWare assembler, and possibly other ix86 assemblers. */
static const template i386_optab[] = {
@@ -589,10 +589,11 @@ static const template i386_optab[] = {
{"fsubp", 2, 0xdee8, _, ShortForm, { FloatReg, FloatAcc, 0} },
#ifdef NON_BROKEN_OPCODES
{"fsubp", 2, 0xdee8, _, ShortForm, { FloatAcc, FloatReg, 0} },
+{"fsubp", 0, 0xdee9, _, NoModrm, { 0, 0, 0} },
#else
{"fsubp", 2, 0xdee0, _, ShortForm, { FloatAcc, FloatReg, 0} },
+{"fsubp", 0, 0xdee1, _, NoModrm, { 0, 0, 0} },
#endif
-{"fsubp", 0, 0xdee9, _, NoModrm, { 0, 0, 0} },
{"fsubs", 1, 0xd8, 4, Modrm, { Mem, 0, 0} },
{"fisubl", 1, 0xda, 4, Modrm, { Mem, 0, 0} },
{"fsubl", 1, 0xdc, 4, Modrm, { Mem, 0, 0} },
@@ -611,10 +612,11 @@ static const template i386_optab[] = {
{"fsubrp", 2, 0xdee0, _, ShortForm, { FloatReg, FloatAcc, 0} },
#ifdef NON_BROKEN_OPCODES
{"fsubrp", 2, 0xdee0, _, ShortForm, { FloatAcc, FloatReg, 0} },
+{"fsubrp", 0, 0xdee1, _, NoModrm, { 0, 0, 0} },
#else
{"fsubrp", 2, 0xdee8, _, ShortForm, { FloatAcc, FloatReg, 0} },
+{"fsubrp", 0, 0xdee9, _, NoModrm, { 0, 0, 0} },
#endif
-{"fsubrp", 0, 0xdee1, _, NoModrm, { 0, 0, 0} },
{"fsubrs", 1, 0xd8, 5, Modrm, { Mem, 0, 0} },
{"fisubrl", 1, 0xda, 5, Modrm, { Mem, 0, 0} },
{"fsubrl", 1, 0xdc, 5, Modrm, { Mem, 0, 0} },
@@ -648,10 +650,11 @@ static const template i386_optab[] = {
{"fdivp", 2, 0xdef8, _, ShortForm, { FloatReg, FloatAcc, 0} },
#ifdef NON_BROKEN_OPCODES
{"fdivp", 2, 0xdef8, _, ShortForm, { FloatAcc, FloatReg, 0} },
+{"fdivp", 0, 0xdef9, _, NoModrm, { 0, 0, 0} },
#else
{"fdivp", 2, 0xdef0, _, ShortForm, { FloatAcc, FloatReg, 0} },
+{"fdivp", 0, 0xdef1, _, NoModrm, { 0, 0, 0} },
#endif
-{"fdivp", 0, 0xdef9, _, NoModrm, { 0, 0, 0} },
{"fdivs", 1, 0xd8, 6, Modrm, { Mem, 0, 0} },
{"fidivl", 1, 0xda, 6, Modrm, { Mem, 0, 0} },
{"fdivl", 1, 0xdc, 6, Modrm, { Mem, 0, 0} },
@@ -670,10 +673,11 @@ static const template i386_optab[] = {
{"fdivrp", 2, 0xdef0, _, ShortForm, { FloatReg, FloatAcc, 0} },
#ifdef NON_BROKEN_OPCODES
{"fdivrp", 2, 0xdef0, _, ShortForm, { FloatAcc, FloatReg, 0} },
+{"fdivrp", 0, 0xdef1, _, NoModrm, { 0, 0, 0} },
#else
{"fdivrp", 2, 0xdef8, _, ShortForm, { FloatAcc, FloatReg, 0} },
+{"fdivrp", 0, 0xdef9, _, NoModrm, { 0, 0, 0} },
#endif
-{"fdivrp", 0, 0xdef1, _, NoModrm, { 0, 0, 0} },
{"fdivrs", 1, 0xd8, 7, Modrm, { Mem, 0, 0} },
{"fidivrl", 1, 0xda, 7, Modrm, { Mem, 0, 0} },
{"fdivrl", 1, 0xdc, 7, Modrm, { Mem, 0, 0} },
@@ -773,22 +777,22 @@ static const template i386_optab[] = {
/* Pentium Pro extensions */
{"rdpmc", 0, 0x0f33, _, NoModrm, { 0, 0, 0} },
-{"cmovo", 2, 0x0f40, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
-{"cmovno", 2, 0x0f41, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
-{"cmovb", 2, 0x0f42, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
-{"cmovae", 2, 0x0f43, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
-{"cmove", 2, 0x0f44, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
-{"cmovne", 2, 0x0f45, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
-{"cmovbe", 2, 0x0f46, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
-{"cmova", 2, 0x0f47, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
-{"cmovs", 2, 0x0f48, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
-{"cmovns", 2, 0x0f49, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
-{"cmovp", 2, 0x0f4a, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
-{"cmovnp", 2, 0x0f4b, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
-{"cmovl", 2, 0x0f4c, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
-{"cmovge", 2, 0x0f4d, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
-{"cmovle", 2, 0x0f4e, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
-{"cmovg", 2, 0x0f4f, _, W|Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
+{"cmovo", 2, 0x0f40, _, Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
+{"cmovno", 2, 0x0f41, _, Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
+{"cmovb", 2, 0x0f42, _, Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
+{"cmovae", 2, 0x0f43, _, Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
+{"cmove", 2, 0x0f44, _, Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
+{"cmovne", 2, 0x0f45, _, Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
+{"cmovbe", 2, 0x0f46, _, Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
+{"cmova", 2, 0x0f47, _, Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
+{"cmovs", 2, 0x0f48, _, Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
+{"cmovns", 2, 0x0f49, _, Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
+{"cmovp", 2, 0x0f4a, _, Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
+{"cmovnp", 2, 0x0f4b, _, Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
+{"cmovl", 2, 0x0f4c, _, Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
+{"cmovge", 2, 0x0f4d, _, Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
+{"cmovle", 2, 0x0f4e, _, Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
+{"cmovg", 2, 0x0f4f, _, Modrm|ReverseRegRegmem, { WordReg|WordMem, WordReg, 0} },
{"fcmovb", 2, 0xdac0, _, ShortForm, { FloatReg, FloatAcc, 0} },
{"fcmove", 2, 0xdac8, _, ShortForm, { FloatReg, FloatAcc, 0} },