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authorMatthew Fortune <matthew.fortune@imgtec.com>2014-07-29 13:18:07 +0100
committerMatthew Fortune <matthew.fortune@imgtec.com>2014-07-29 13:58:54 +0100
commit43885403ede73aa83b37cfa0e7a254b6f255d5af (patch)
tree6bdc1bc3ecf278ce8183c168ef0e76933044d218 /include
parentea99bdb59dfddd883c70428f24d16bf1ad3ded93 (diff)
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[MIPS] Rename COPROC related macros
gas/ * config/tc-mips.c: Rename INSN_LOAD_COPROC_DELAY to INSN_LOAD_COPROC and INSN_COPROC_MOVE_DELAY to INSN_COPROC_MOVE throughout. include/opcode/ * mips.h (INSN_LOAD_COPROC_DELAY): Rename to... (INSN_LOAD_COPROC): New define. (INSN_COPROC_MOVE_DELAY): Rename to... (INSN_COPROC_MOVE): New define. opcodes/ * micromips-opc.c (COD): Rename throughout to... (CM): New define, update to use INSN_COPROC_MOVE. (LCD): Rename throughout to... (LC): New define, update to use INSN_LOAD_COPROC. * mips-opc.c: Likewise.
Diffstat (limited to 'include')
-rw-r--r--include/opcode/ChangeLog7
-rw-r--r--include/opcode/mips.h8
2 files changed, 11 insertions, 4 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 3ddc36c..95532b1 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,10 @@
+2014-07-29 Matthew Fortune <matthew.fortune@imgtec.com>
+
+ * mips.h (INSN_LOAD_COPROC_DELAY): Rename to...
+ (INSN_LOAD_COPROC): New define.
+ (INSN_COPROC_MOVE_DELAY): Rename to...
+ (INSN_COPROC_MOVE): New define.
+
2014-07-01 Barney Stratford <barney_stratford@fastmail.fm>
Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
Pitchumani Sivanupandi <pitchumani.s@atmel.com>
diff --git a/include/opcode/mips.h b/include/opcode/mips.h
index 6ae1f3a..846cc0f 100644
--- a/include/opcode/mips.h
+++ b/include/opcode/mips.h
@@ -973,16 +973,16 @@ struct mips_opcode
#define INSN_COP 0x00000400
/* Instruction loads value from memory. */
#define INSN_LOAD_MEMORY 0x00000800
-/* Instruction loads value from coprocessor, requiring delay. */
-#define INSN_LOAD_COPROC_DELAY 0x00001000
+/* Instruction loads value from coprocessor, (may require delay). */
+#define INSN_LOAD_COPROC 0x00001000
/* Instruction has unconditional branch delay slot. */
#define INSN_UNCOND_BRANCH_DELAY 0x00002000
/* Instruction has conditional branch delay slot. */
#define INSN_COND_BRANCH_DELAY 0x00004000
/* Conditional branch likely: if branch not taken, insn nullified. */
#define INSN_COND_BRANCH_LIKELY 0x00008000
-/* Moves to coprocessor register, requiring delay. */
-#define INSN_COPROC_MOVE_DELAY 0x00010000
+/* Moves to coprocessor register, (may require delay). */
+#define INSN_COPROC_MOVE 0x00010000
/* Loads coprocessor register from memory, requiring delay. */
#define INSN_COPROC_MEMORY_DELAY 0x00020000
/* Reads the HI register. */