Add support for v850E2 and v850E2V3

4 files changed, 119 insertions, 27 deletions

diff --git a/include/elf/ChangeLog b/include/elf/ChangeLog
index edd9b48..61bbf81 100644
--- a/include/elf/ChangeLog
+++ b/include/elf/ChangeLog
@@ -1,3 +1,9 @@
+2010-07-23  Naveen.H.S  <naveen.S@kpitcummins.com>
+	    Ina Pandit  <ina.pandit@kpitcummins.com>
+
+	* v850.h: Add support for V850E2 and V850E2V3.
+	(v850_reloc_type): Update the newly added relocations
+
 2010-07-20  Alan Modra  <amodra@gmail.com>
 
 	* internal.h (ELF_TBSS_SPECIAL): New macro, extracted from..
diff --git a/include/elf/v850.h b/include/elf/v850.h
index 71ae1db..2a0e03e 100644
--- a/include/elf/v850.h
+++ b/include/elf/v850.h
@@ -40,6 +40,11 @@
 /* v850e1 code.  */
 #define E_V850E1_ARCH		0x20000000
 
+/* v850e2 code.  */
+#define E_V850E2_ARCH		0x30000000
+
+/* v850e2v3 code.  */
+#define E_V850E2V3_ARCH		0x40000000
 
 /* Flags for the st_other field.  */
 #define V850_OTHER_SDA		0x10	/* Symbol had SDA relocations.  */
@@ -81,6 +86,29 @@ START_RELOC_NUMBERS (v850_reloc_type)
      RELOC_NUMBER (R_V850_ALIGN, 27)
      RELOC_NUMBER (R_V850_REL32, 28)
      RELOC_NUMBER (R_V850_LO16_SPLIT_OFFSET, 29)	/* For ld.bu */
+     RELOC_NUMBER (R_V850_16_PCREL, 30)      		/* For loop */
+     RELOC_NUMBER (R_V850_17_PCREL, 31)      		/* For br */
+     RELOC_NUMBER (R_V850_23, 32)			/* For 23bit ld.[w,h,hu,b,bu],st.[w,h,b] */
+     RELOC_NUMBER (R_V850_32_PCREL, 33)      		/* For jr32, jarl32 */
+     RELOC_NUMBER (R_V850_32_ABS, 34)      		/* For jmp32 */
+     RELOC_NUMBER (R_V850_16_SPLIT_OFFSET, 35)      	/* For ld.bu */
+     RELOC_NUMBER (R_V850_16_S1, 36)      		/* For ld.w, ld.h st.w st.h */
+     RELOC_NUMBER (R_V850_LO16_S1, 37)      		/* For ld.w, ld.h st.w st.h */
+     RELOC_NUMBER (R_V850_CALLT_15_16_OFFSET, 38)	/* For ld.w, ld.h, ld.hu, st.w, st.h */
+     RELOC_NUMBER (R_V850_32_GOTPCREL, 39)		/* GLOBAL_OFFSET_TABLE from pc */
+     RELOC_NUMBER (R_V850_16_GOT, 40)      		/* GOT ENTRY from gp */
+     RELOC_NUMBER (R_V850_32_GOT, 41)      		
+     RELOC_NUMBER (R_V850_22_PLT, 42)			/* For jr */
+     RELOC_NUMBER (R_V850_32_PLT, 43)			/* For jr32 */
+     RELOC_NUMBER (R_V850_COPY, 44)      		
+     RELOC_NUMBER (R_V850_GLOB_DAT, 45)      		
+     RELOC_NUMBER (R_V850_JMP_SLOT, 46)      		
+     RELOC_NUMBER (R_V850_RELATIVE, 47)      		
+     RELOC_NUMBER (R_V850_16_GOTOFF, 48)      		/* From gp */
+     RELOC_NUMBER (R_V850_32_GOTOFF, 49)      		
+     RELOC_NUMBER (R_V850_CODE, 50)      		
+     RELOC_NUMBER (R_V850_DATA, 51)      		/* For loop */
+
 END_RELOC_NUMBERS (R_V850_max)
 
 
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index aa09a3a..f2e1345 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,21 @@
+2010-07-23  Naveen.H.S  <naveen.S@kpitcummins.com>
+	    Ina Pandit  <ina.pandit@kpitcummins.com>
+
+	* v850.h: Define PROCESSOR_MASK, PROCESSOR_OPTION_EXTENSION,
+	PROCESSOR_OPTION_ALIAS, PROCESSOR_V850E2, PROCESSOR_V850E2V3 and
+	PROCESSOR_V850E2_ALL.
+	Remove PROCESSOR_V850EA support.
+	(v850_operand): Define V850_OPERAND_EP, V850_OPERAND_FLOAT_CC,
+	V850_OPERAND_VREG, V850E_IMMEDIATE16, V850E_IMMEDIATE16HI,
+	V850E_IMMEDIATE23, V850E_IMMEDIATE32, V850_OPERAND_SIGNED,
+	V850_OPERAND_DISP, V850_PCREL, V850_REG_EVEN, V850E_PUSH_POP,
+	V850_NOT_IMM0, V850_NOT_SA, V850_OPERAND_BANG and
+	V850_OPERAND_PERCENT.
+	Update V850_OPERAND_SRG, V850_OPERAND_CC, V850_OPERAND_RELAX and
+	V850_NOT_R0.
+	Remove V850_OPERAND_SIGNED, V850_OPERAND_EP, V850_OPERAND_DISP
+	and V850E_PUSH_POP
+
 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
 
 	* mips.h (MIPS16_INSN_UNCOND_BRANCH): New macro.
diff --git a/include/opcode/v850.h b/include/opcode/v850.h
index fcf9631..5903305 100644
--- a/include/opcode/v850.h
+++ b/include/opcode/v850.h
@@ -55,12 +55,18 @@ struct v850_opcode
 };
 
 /* Values for the processors field in the v850_opcode structure.  */
+#define PROCESSOR_MASK		0x1f
+#define PROCESSOR_OPTION_EXTENSION	(1 << 5)	/* Enable extension opcodes.  */
+#define PROCESSOR_OPTION_ALIAS	(1 << 6)		/* Enable alias opcodes.  */
 #define PROCESSOR_V850		(1 << 0)		/* Just the V850.  */
-#define PROCESSOR_ALL		-1			/* Any processor.  */
-#define PROCESSOR_V850E		(1 << 1)		/* Just the V850E. */
-#define PROCESSOR_NOT_V850	(~ PROCESSOR_V850)	/* Any processor except the V850.  */
-#define PROCESSOR_V850EA	(1 << 2)		/* Just the V850EA. */
-#define PROCESSOR_V850E1	(1 << 3)		/* Just the V850E1. */
+#define PROCESSOR_ALL		PROCESSOR_MASK		/* Any processor.  */
+#define PROCESSOR_V850E		(1 << 1)		/* Just the V850E.  */
+#define PROCESSOR_NOT_V850	(PROCESSOR_ALL & (~ PROCESSOR_V850))	/* Any processor except the V850.  */
+#define PROCESSOR_V850E1	(1 << 2)		/* Just the V850E1.  */
+#define PROCESSOR_V850E2	(1 << 3)		/* Just the V850E2.  */
+#define PROCESSOR_V850E2V3	(1 << 4)		/* Just the V850E2V3.  */
+#define PROCESSOR_V850E2_ALL	(PROCESSOR_V850E2 | PROCESSOR_V850E2V3)	/* V850E2 & V850E2V3.  */
+#define SET_PROCESSOR_MASK(mask,set)	((mask) = ((mask) & ~PROCESSOR_MASK) | (set))
 
 /* The table itself is sorted by major opcode number, and is otherwise
    in the order in which the disassembler should consider
@@ -74,7 +80,8 @@ extern const int v850_num_opcodes;
 struct v850_operand
 {
   /* The number of bits in the operand.  */
-  /* If this value is -1 then the operand's bits are in a discontinous distribution in the instruction. */
+  /* If this value is -1 then the operand's bits are in a discontinous
+     distribution in the instruction. */
   int bits;
 
   /* (bits >= 0):  How far the operand is left shifted in the instruction.  */
@@ -120,6 +127,8 @@ struct v850_operand
 
   /* One bit syntax flags.  */
   int flags;
+
+  int default_reloc;
 };
 
 /* Elements in the table are retrieved by indexing with values from
@@ -129,39 +138,70 @@ extern const struct v850_operand v850_operands[];
 
 /* Values defined for the flags field of a struct v850_operand.  */
 
-/* This operand names a general purpose register */
+/* This operand names a general purpose register.  */
 #define V850_OPERAND_REG	0x01
 
-/* This operand names a system register */
-#define V850_OPERAND_SRG	0x02
+/* This operand is the ep register.  */
+#define V850_OPERAND_EP		0x02
 
-/* This operand names a condition code used in the setf instruction */
-#define V850_OPERAND_CC		0x04
+/* This operand names a system register.  */
+#define V850_OPERAND_SRG	0x04
 
-/* This operand takes signed values */
-#define V850_OPERAND_SIGNED	0x08
+/* Prologue eilogue type instruction, V850E specific.  */
+#define V850E_OPERAND_REG_LIST	0x08
 
-/* This operand is the ep register.  */
-#define V850_OPERAND_EP		0x10
+/* This operand names a condition code used in the setf instruction.  */
+#define V850_OPERAND_CC		0x10
 
-/* This operand is a PC displacement */
-#define V850_OPERAND_DISP	0x20
+#define V850_OPERAND_FLOAT_CC	0x20
 
-/* This is a relaxable operand.   Only used for D9->D22 branch relaxing
-   right now.  We may need others in the future (or maybe handle them like
-   promoted operands on the mn10300?)  */
-#define V850_OPERAND_RELAX	0x40
+/* This operand names a vector purpose register.  */
+#define V850_OPERAND_VREG	0x40
 
-/* The register specified must not be r0 */
-#define V850_NOT_R0	        0x80
+/* 16 bit immediate follows instruction, V850E specific.  */
+#define V850E_IMMEDIATE16	0x80
 
-/* push/pop type instruction, V850E specific.  */
-#define V850E_PUSH_POP		0x100
+/* hi16 bit immediate follows instruction, V850E specific.  */
+#define V850E_IMMEDIATE16HI	0x100
 
-/* 16 bit immediate follows instruction, V850E specific.  */
-#define V850E_IMMEDIATE16	0x200
+/* 23 bit immediate follows instruction, V850E specific.  */
+#define V850E_IMMEDIATE23	0x200
 
 /* 32 bit immediate follows instruction, V850E specific.  */
 #define V850E_IMMEDIATE32	0x400
 
+/* This is a relaxable operand.   Only used for D9->D22 branch relaxing
+   right now.  We may need others in the future (or maybe handle them like
+   promoted operands on the mn10300?).  */
+#define V850_OPERAND_RELAX	0x800
+
+/* This operand takes signed values.  */
+#define V850_OPERAND_SIGNED	0x1000
+
+/* This operand is a displacement.  */
+#define V850_OPERAND_DISP	0x2000
+
+/* This operand is a PC displacement.  */
+#define V850_PCREL		0x4000
+
+/* The register specified must be even number.  */
+#define V850_REG_EVEN		0x8000
+
+/* The register specified must not be r0.  */
+#define V850_NOT_R0	        0x20000
+
+/* The register specified must not be 0.  */
+#define V850_NOT_IMM0	        0x40000
+
+/* The condition code must not be SA CONDITION.  */
+#define V850_NOT_SA		0x80000
+
+/* The operand has '!' prefix.  */
+#define V850_OPERAND_BANG	0x100000
+
+/* The operand has '%' prefix.  */
+#define V850_OPERAND_PERCENT	0x200000
+
+extern int v850_msg_is_out_of_range (const char * msg);
+
 #endif /* V850_H */