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| author | David S. Miller <davem@redhat.com> | 2012-04-27 18:02:35 +0000 |
|---|---|---|
| committer | David S. Miller <davem@redhat.com> | 2012-04-27 18:02:35 +0000 |
| commit | 6cda13266f4d767456ccd5ee9f4c8539b463fc0e (patch) | |
| tree | 69e6d6b48d1d5b2a1f7b214b1ef7362ca973c5d9 /include | |
| parent | ec668d69b9517c6344f8c659f2014197b780f2da (diff) | |
| download | gdb-6cda13266f4d767456ccd5ee9f4c8539b463fc0e.zip gdb-6cda13266f4d767456ccd5ee9f4c8539b463fc0e.tar.gz gdb-6cda13266f4d767456ccd5ee9f4c8539b463fc0e.tar.bz2 | |
Add support for SPARC T4 crypto instructions.
include/opcode/
* sparc.h: Document new arg code' )' for crypto RS3
immediates.
opcodes/
* sparc-dis.c (print_insn_sparc): Handle ')'.
* sparc-opc.c (sparc_opcodes): Add crypto instructions.
gas/
* config/tc-sparc.c (sparc_ip): Likewise. Accept instruction
names containing "_".
(sparc_arch_table): Add sparc4, v8pluse, and v9e. Add crypto
hwcap masks to v8plusv and v9v.
gas/testsuite/
* gas/sparc/crypto.s: New file.
* gas/sparc/crypto.d: New file.
* gas/sparc/sparc.exp: Run crypto test.
Diffstat (limited to 'include')
| -rw-r--r-- | include/opcode/ChangeLog | 3 | ||||
| -rw-r--r-- | include/opcode/sparc.h | 1 |
2 files changed, 4 insertions, 0 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index f807cac..d4fb384 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,5 +1,8 @@ 2012-04-27 David S. Miller <davem@davemloft.net> + * sparc.h: Document new arg code' )' for crypto RS3 + immediates. + * sparc.h (struct sparc_opcode): New field 'hwcaps'. F_MUL32, F_DIV32, F_FDMULD, F_V8PLUS, F_POPC, F_VIS, F_VIS2, F_ASI_BLK_INIT, F_FMAF, F_VIS3, F_HPC, F_RANDOM, F_TRANS, diff --git a/include/opcode/sparc.h b/include/opcode/sparc.h index 5d4d3c9..b1c5e42 100644 --- a/include/opcode/sparc.h +++ b/include/opcode/sparc.h @@ -224,6 +224,7 @@ typedef struct sparc_opcode _ Ancillary state register in rd (v9a) / Ancillary state register in rs1 (v9a) ( entire floating point state register (%efsr) + ) 5 bit immediate placed in RS3 field = 2+8 bit PC relative immediate. (v9) */ #define OP2(x) (((x) & 0x7) << 22) /* Op2 field of format2 insns. */ |