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authornobody <>2005-11-17 00:00:03 +0000
committernobody <>2005-11-17 00:00:03 +0000
commit7153440fc9e8b787288e4b69695436d29ec7090e (patch)
treee8347e86e0acfd54c6e016e4f79fcac305a32442 /include
parentafa48399debfcfa568e71e5295416b80b1573c82 (diff)
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This commit was manufactured by cvs2svn to create branch 'gdb-csl-gxxpro-gdb-csl-gxxpro-6_3-branchpoint
6_3-branch'. Sprout from gdb_6_4-branch 2005-11-04 02:48:52 UTC nobody 'This commit was manufactured by cvs2svn to create branch 'gdb_6_4-branch'.' Cherrypick from gdb_6_4-branch 2005-11-01 22:57:24 UTC nobody 'This commit was manufactured by cvs2svn to create branch 'gdb_6_4-branch'.': gdb/README Cherrypick from master 2005-11-17 00:00:02 UTC gdbadmin <gdbadmin@sourceware.org> '*** empty log message ***': ChangeLog Makefile.def Makefile.in Makefile.tpl bfd/ChangeLog bfd/archures.c bfd/bfd-in2.h bfd/bfdio.c bfd/cache.c bfd/config.in bfd/configure bfd/configure.host bfd/configure.in bfd/cpu-ms1.c bfd/elf.c bfd/elf32-ms1.c bfd/elflink.c bfd/elfxx-mips.c bfd/elfxx-mips.h bfd/libbfd-in.h bfd/libbfd.h bfd/opncls.c bfd/reloc.c bfd/version.h bfd/warning.m4 configure configure.in cpu/ChangeLog cpu/ms1.cpu cpu/ms1.opc gdb/ChangeLog gdb/MAINTAINERS gdb/Makefile.in gdb/NEWS gdb/arm-linux-tdep.c gdb/cli/cli-script.c gdb/doc/ChangeLog gdb/doc/gdb.texinfo gdb/dwarf2loc.c gdb/dwarf2read.c gdb/elfread.c gdb/event-top.c gdb/frv-linux-tdep.c gdb/frv-tdep.c gdb/gdbserver/ChangeLog gdb/gdbserver/configure.srv gdb/gdbserver/linux-arm-low.c gdb/gdbserver/linux-x86-64-low.c gdb/hppa-linux-nat.c gdb/ia64-tdep.c gdb/infrun.c gdb/inftarg.c gdb/interps.h gdb/linux-nat.c gdb/m32r-linux-tdep.c gdb/m32r-tdep.c gdb/m68hc11-tdep.c gdb/main.c gdb/main.h gdb/monitor.c gdb/ppc-sysv-tdep.c gdb/remote-e7000.c gdb/remote-m32r-sdi.c gdb/sh-tdep.c gdb/sh64-tdep.c gdb/solib-frv.c gdb/testsuite/ChangeLog gdb/testsuite/gdb.arch/gdb1558.c gdb/testsuite/gdb.asm/asm-source.exp gdb/testsuite/gdb.asm/m68hc11.inc gdb/testsuite/gdb.base/break.exp gdb/testsuite/gdb.base/structs2.exp gdb/thread.c gdb/top.c gdb/tui/tui-command.c gdb/tui/tui-interp.c gdb/tui/tui-win.c gdb/version.in include/ChangeLog include/bfdlink.h include/elf/ChangeLog include/elf/hppa.h include/elf/mips.h include/elf/ms1.h include/opcode/ChangeLog include/opcode/mips.h libiberty/ChangeLog libiberty/splay-tree.c opcodes/ChangeLog opcodes/arm-dis.c opcodes/configure opcodes/i386-dis.c opcodes/iq2000-desc.c opcodes/iq2000-desc.h opcodes/iq2000-dis.c opcodes/iq2000-opc.c opcodes/m32c-desc.c opcodes/m68k-dis.c opcodes/mips-dis.c opcodes/mips16-opc.c opcodes/ms1-asm.c opcodes/ms1-desc.c opcodes/ms1-desc.h opcodes/ms1-dis.c opcodes/ms1-ibld.c opcodes/ms1-opc.c opcodes/ms1-opc.h opcodes/ppc-opc.c sim/ChangeLog sim/cris/cris-tmpl.c sim/sh/ChangeLog sim/sh/interp.c Delete: gdb/config/ms1/ms1.mt gdb/config/v850/v850.mt gdb/testsuite/gdb.ada/array_return/p.adb gdb/testsuite/gdb.ada/array_return/pck.adb gdb/testsuite/gdb.ada/array_return/pck.ads gdb/testsuite/gdb.ada/arrayidx/p.adb
Diffstat (limited to 'include')
-rw-r--r--include/ChangeLog13
-rw-r--r--include/bfdlink.h2
-rw-r--r--include/elf/ChangeLog6
-rw-r--r--include/elf/hppa.h6
-rw-r--r--include/elf/mips.h7
-rw-r--r--include/elf/ms1.h1
-rw-r--r--include/opcode/ChangeLog6
-rw-r--r--include/opcode/mips.h9
8 files changed, 42 insertions, 8 deletions
diff --git a/include/ChangeLog b/include/ChangeLog
index e2c90f8..3b2f3ef 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,16 @@
+2005-11-07 Nathan Sidwell <nathan@codesourcery.com>
+
+ Add ms2.
+ * elf/ms1.h (EF_MS1_CPU_MS2): New.
+
+2005-11-06 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
+
+ * elf/hppa.h (R_PARISC_DIR64WR, R_PARISC_DIR64DR): Remove relocs.
+
+2005-11-03 Alan Modra <amodra@bigpond.net.au>
+
+ * bfdlink.h (struct bfd_link_order): Tweak comment.
+
2005-10-31 Mark Kettenis <kettenis@gnu.org>
* floatformat.h (enum floatformat_byteorders): Add
diff --git a/include/bfdlink.h b/include/bfdlink.h
index 66a5b42..3c978e8 100644
--- a/include/bfdlink.h
+++ b/include/bfdlink.h
@@ -554,7 +554,7 @@ enum bfd_link_order_type
};
/* This is the link_order structure itself. These form a chain
- attached to the section whose contents they are describing. */
+ attached to the output section whose contents they are describing. */
struct bfd_link_order
{
diff --git a/include/elf/ChangeLog b/include/elf/ChangeLog
index 485a78e..af4947c 100644
--- a/include/elf/ChangeLog
+++ b/include/elf/ChangeLog
@@ -1,3 +1,9 @@
+2005-11-11 Nick Clifton <nickc@redhat.com>
+
+ PR 1150
+ * mips.h (STO_OPTIONAL): Define.
+ (ELF_MIPS_IS_OPTIONAL): Define.
+
2005-09-30 Catherine Moore <clm@cm00re.com>
* bfin.h: New file.
diff --git a/include/elf/hppa.h b/include/elf/hppa.h
index 57efac6..38a464e 100644
--- a/include/elf/hppa.h
+++ b/include/elf/hppa.h
@@ -309,12 +309,6 @@ RELOC_NUMBER (R_PARISC_PCREL16DF, 79)
RELOC_NUMBER (R_PARISC_DIR64, 80)
/* 64-bit doubleword symbol + addend */
-RELOC_NUMBER (R_PARISC_DIR64WR, 81)
-/* 64-bit doubleword RR(symbol, addend) */
-
-RELOC_NUMBER (R_PARISC_DIR64DR, 82)
-/* 64-bit doubleword RR(symbol, addend) */
-
RELOC_NUMBER (R_PARISC_DIR14WR, 83)
/* load/store mod. comp. (2) RR(symbol, addend) */
diff --git a/include/elf/mips.h b/include/elf/mips.h
index 540815b..6afc12f 100644
--- a/include/elf/mips.h
+++ b/include/elf/mips.h
@@ -718,6 +718,13 @@ extern void bfd_mips_elf32_swap_reginfo_out
/* This value is used for a mips16 .text symbol. */
#define STO_MIPS16 0xf0
+
+/* This bit is used on Irix to indicate a symbol whose definition
+ is optional - if, at final link time, it cannot be found, no
+ error message should be produced. */
+#define STO_OPTIONAL (1 << 2)
+/* A macro to examine the STO_OPTIONAL bit. */
+#define ELF_MIPS_IS_OPTIONAL(other) ((other) & STO_OPTIONAL)
/* The 64-bit MIPS ELF ABI uses an unusual reloc format. Each
relocation entry specifies up to three actual relocations, all at
diff --git a/include/elf/ms1.h b/include/elf/ms1.h
index 747dc89..1cb7ad6 100644
--- a/include/elf/ms1.h
+++ b/include/elf/ms1.h
@@ -35,6 +35,7 @@ END_RELOC_NUMBERS(R_MS1_max)
#define EF_MS1_CPU_MRISC 0x00000001 /* default */
#define EF_MS1_CPU_MRISC2 0x00000002 /* MRISC2 */
+#define EF_MS1_CPU_MS2 0x00000003 /* MS2 */
#define EF_MS1_CPU_MASK 0x00000003 /* specific cpu bits */
#define EF_MS1_ALL_FLAGS (EF_MS1_CPU_MASK)
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index a282a62..c9a4a12 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,9 @@
+2005-11-14 David Ung <davidu@mips.com>
+
+ * mips.h: Assign 'm'/'M' codes to MIPS16e save/restore
+ instructions. Define MIPS16_ALL_ARGS and MIPS16_ALL_STATICS for
+ save/restore encoding of the args field.
+
2005-10-28 Dave Brolley <brolley@redhat.com>
Contribute the following changes:
diff --git a/include/opcode/mips.h b/include/opcode/mips.h
index e46ba2c..4bec5ed 100644
--- a/include/opcode/mips.h
+++ b/include/opcode/mips.h
@@ -928,7 +928,14 @@ extern int bfd_mips_num_opcodes;
"A" 8 bit PC relative address * 4 (MIPS16OP_*_IMM8)
"B" 5 bit PC relative address * 8 (MIPS16OP_*_IMM5)
"E" 5 bit PC relative address * 4 (MIPS16OP_*_IMM5)
- */
+ "m" 7 bit register list for save instruction (18 bit extended)
+ "M" 7 bit register list for restore instruction (18 bit extended)
+ */
+
+/* Save/restore encoding for the args field when all 4 registers are
+ either saved as arguments or saved/restored as statics. */
+#define MIPS16_ALL_ARGS 0xe
+#define MIPS16_ALL_STATICS 0xb
/* For the mips16, we use the same opcode table format and a few of
the same flags. However, most of the flags are different. */