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| author | Chenghua Xu <paul.hua.gm@gmail.com> | 2018-08-29 20:36:23 +0800 |
|---|---|---|
| committer | Chenghua Xu <paul.hua.gm@gmail.com> | 2018-08-29 20:43:19 +0800 |
| commit | bd782c07b914f28fd927cec42eacd8adcf556dca (patch) | |
| tree | 5fe589fdb8177e2471661eca4f913e6a9616630c /include | |
| parent | ac8cb70f3690b4eace1325c7ff918dce9073da7c (diff) | |
| download | gdb-bd782c07b914f28fd927cec42eacd8adcf556dca.zip gdb-bd782c07b914f28fd927cec42eacd8adcf556dca.tar.gz gdb-bd782c07b914f28fd927cec42eacd8adcf556dca.tar.bz2 | |
[MIPS] Add Loongson 3A2000/3A3000 proccessor support.
bfd/
* archures.c (bfd_architecture): New machine
bfd_mach_mips_gs464e.
* bfd-in2.h (bfd_architecture): Likewise.
* cpu-mips.c (enum I_xxx): Likewise.
(arch_info_struct): Likewise.
* elfxx-mips.c (_bfd_elf_mips_mach): Handle
E_MIPS_MACH_GS464E.
(mips_set_isa_flags): Likewise.
(mips_mach_extensions): Map bfd_mach_mips_gs464e to
bfd_mach_mips_gs464 extension.
binutils/
* NEWS: Mention Loongson 3A2000/3A3000 proccessor support.
* readelf.c (get_machine_flags): Handle gs464e.
elfcpp/
* mips.c (EF_MIPS_MACH): New E_MIPS_MACH_GS464E.
gas/
* config/tc-mips.c (ISA_HAS_ODD_SINGLE_FPR): Exclude CPU_GS464E.
(mips_cpu_info_table): Add gs464e descriptors.
* doc/as.texi (march table): Add gs464e.
include/
* elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS464E.
* opcode/mips.h (CPU_XXX): New CPU_GS464E.
ld/
* testsuite/ld-mips-elf/mips-elf-flags.exp: Run good_combination
gs464e and gs464.
opcodes/
* mips-dis.c (mips_arch_choices): Add gs464e descriptors.
Diffstat (limited to 'include')
| -rw-r--r-- | include/ChangeLog | 6 | ||||
| -rw-r--r-- | include/elf/mips.h | 1 | ||||
| -rw-r--r-- | include/opcode/mips.h | 1 |
3 files changed, 8 insertions, 0 deletions
diff --git a/include/ChangeLog b/include/ChangeLog index 1a516ab..623c954 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,5 +1,11 @@ 2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com> + + * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS464E. + * opcode/mips.h (CPU_XXX): New CPU_GS464E. + +2018-08-29 Chenghua Xu <paul.hua.gm@gmail.com> + * elf/mips.h (E_MIPS_MACH_XXX): Rename E_MIPS_MACH_LS3A to E_MIPS_MACH_GS464. (AFL_EXT_XXX): Delete AFL_EXT_LOONGSON_3A. diff --git a/include/elf/mips.h b/include/elf/mips.h index db24080..e27b6af 100644 --- a/include/elf/mips.h +++ b/include/elf/mips.h @@ -300,6 +300,7 @@ END_RELOC_NUMBERS (R_MIPS_maxext) #define E_MIPS_MACH_LS2E 0x00A00000 #define E_MIPS_MACH_LS2F 0x00A10000 #define E_MIPS_MACH_GS464 0x00A20000 +#define E_MIPS_MACH_GS464E 0x00A30000 /* Processor specific section indices. These sections do not actually exist. Symbols with a st_shndx field corresponding to one of these diff --git a/include/opcode/mips.h b/include/opcode/mips.h index 9424a92..4ad65c9 100644 --- a/include/opcode/mips.h +++ b/include/opcode/mips.h @@ -1373,6 +1373,7 @@ static const unsigned int mips_isa_table[] = { #define CPU_LOONGSON_2E 3001 #define CPU_LOONGSON_2F 3002 #define CPU_GS464 3003 +#define CPU_GS464E 3004 #define CPU_OCTEON 6501 #define CPU_OCTEONP 6601 #define CPU_OCTEON2 6502 |