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| author | Matthew Malcomson <matthew.malcomson@arm.com> | 2019-05-09 10:29:27 +0100 |
|---|---|---|
| committer | Matthew Malcomson <matthew.malcomson@arm.com> | 2019-05-09 10:29:27 +0100 |
| commit | 28ed815ad2b0cb93eede83022269d6a60b9cdf31 (patch) | |
| tree | 0edb14415647f239d12f539a8ea897a1c077e094 /include | |
| parent | fd1dc4a0c1b87c1efa7e0398fd47fd1e87fa0fb4 (diff) | |
| download | gdb-28ed815ad2b0cb93eede83022269d6a60b9cdf31.zip gdb-28ed815ad2b0cb93eede83022269d6a60b9cdf31.tar.gz gdb-28ed815ad2b0cb93eede83022269d6a60b9cdf31.tar.bz2 | |
[binutils][aarch64] New SVE_SHLIMM_UNPRED_22 operand.
New operand describes a shift-left immediate encoded in bits
22:20-19:18-16 where UInt(bits) - esize == shift.
This operand is useful for instructions like sshllb.
gas/ChangeLog:
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
* config/tc-aarch64.c (parse_operands): Handle new SVE_SHLIMM_UNPRED_22
operand.
include/ChangeLog:
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
* opcode/aarch64.h (enum aarch64_opnd): New SVE_SHLIMM_UNPRED_22
operand.
opcodes/ChangeLog:
2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
* aarch64-asm-2.c: Regenerated.
* aarch64-dis-2.c: Regenerated.
* aarch64-opc-2.c: Regenerated.
* aarch64-opc.c (operand_general_constraint_met_p): Constraint checking
for SVE_SHLIMM_UNPRED_22.
(aarch64_print_operand): Add printing for SVE_SHLIMM_UNPRED_22.
* aarch64-tbl.h (AARCH64_OPERANDS): Use new SVE_SHLIMM_UNPRED_22
operand.
Diffstat (limited to 'include')
| -rw-r--r-- | include/ChangeLog | 5 | ||||
| -rw-r--r-- | include/opcode/aarch64.h | 1 |
2 files changed, 6 insertions, 0 deletions
diff --git a/include/ChangeLog b/include/ChangeLog index 8a990f3..be6240e 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,5 +1,10 @@ 2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com> + * opcode/aarch64.h (enum aarch64_opnd): New SVE_SHLIMM_UNPRED_22 + operand. + +2019-05-09 Matthew Malcomson <matthew.malcomson@arm.com> + * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_tsz_bhs iclass. diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index e354e65..a4520da 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -392,6 +392,7 @@ enum aarch64_opnd AARCH64_OPND_SVE_Rn_SP, /* Integer Rn or SP, alt. SVE position. */ AARCH64_OPND_SVE_SHLIMM_PRED, /* SVE shift left amount (predicated). */ AARCH64_OPND_SVE_SHLIMM_UNPRED, /* SVE shift left amount (unpredicated). */ + AARCH64_OPND_SVE_SHLIMM_UNPRED_22, /* SVE 3 bit shift left unpred. */ AARCH64_OPND_SVE_SHRIMM_PRED, /* SVE shift right amount (predicated). */ AARCH64_OPND_SVE_SHRIMM_UNPRED, /* SVE shift right amount (unpredicated). */ AARCH64_OPND_SVE_SHRIMM_UNPRED_22, /* SVE 3 bit shift right unpred. */ |