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authorChris Demetriou <cgd@google.com>2003-01-02 20:03:09 +0000
committerChris Demetriou <cgd@google.com>2003-01-02 20:03:09 +0000
commit071742cf9703a573f453fc827bb93a7acda856ac (patch)
tree39861f51e1781fbe971fc9bef4561e2fafa1ef50 /include
parent06825bd145fd60c4a792d249af1231bdd360579c (diff)
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[ gas/ChangeLog ]
2003-01-02 Chris Demetriou <cgd@broadcom.com> * config/tc-mips.c: Update copyright years to include 2003. (mips_ip): Fix indentation of "+A", "+B", and "+C" handling. Additionally, clean up their code slightly and clean up their comments some more. * doc/c-mips.texi: Add MIPS32r2 to ".set mipsN" documentation. [ gas/testsuite/ChangeLog ] 2003-01-02 Chris Demetriou <cgd@broadcom.com> * gas/mips/elf_arch_mips32r2.d: Fix file description comment. [ include/opcode/ChangeLog ] 2003-01-02 Chris Demetriou <cgd@broadcom.com> * mips.h: Update copyright years to include 2002 (which had been missed previously) and 2003. Make comments about "+A", "+B", and "+C" operand types more descriptive.
Diffstat (limited to 'include')
-rw-r--r--include/opcode/ChangeLog6
-rw-r--r--include/opcode/mips.h15
2 files changed, 15 insertions, 6 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 89a231b..7386c5e 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,9 @@
+2003-01-02 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.h: Update copyright years to include 2002 (which had
+ been missed previously) and 2003. Make comments about "+A",
+ "+B", and "+C" operand types more descriptive.
+
2002-12-31 Chris Demetriou <cgd@broadcom.com>
* mips.h: Note that the "+D" operand type name is now used.
diff --git a/include/opcode/mips.h b/include/opcode/mips.h
index 19f3e21..bcc0fc6 100644
--- a/include/opcode/mips.h
+++ b/include/opcode/mips.h
@@ -1,5 +1,5 @@
/* mips.h. Mips opcode list for GDB, the GNU debugger.
- Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001
+ Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
Free Software Foundation, Inc.
Contributed by Ralph Campbell and OSF
Commented and modified by Ian Lance Taylor, Cygnus Support
@@ -233,11 +233,14 @@ struct mips_opcode
"x" accept and ignore register name
"z" must be zero register
"K" 5 bit Hardware Register (rdhwr instruction) (OP_*_RD)
- "+A" 5 bit ins/ext position/lsb (OP_*_SHAMT)
- "+B" 5 bit "ins" size spec (OP_*_INSMSB). Requires that "+A"
- occur first!
- "+C" 5 bit "ext" msbd spec (OP_*_EXTMSBD). Requires that "+A"
- occur first!
+ "+A" 5 bit ins/ext position, which becomes LSB (OP_*_SHAMT).
+ Enforces: 0 <= pos < 32.
+ "+B" 5 bit ins size, which becomes MSB (OP_*_INSMSB).
+ Requires that "+A" occur first to set position.
+ Enforces: 0 < (pos+size) <= 32.
+ "+C" 5 bit ext size, which becomes MSBD (OP_*_EXTMSBD).
+ Requires that "+A" occur first to set position.
+ Enforces: 0 < (pos+size) <= 32.
Floating point instructions:
"D" 5 bit destination register (OP_*_FD)