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| author | Thomas Preud'homme <thomas.preudhomme@arm.com> | 2016-08-26 11:53:30 +0100 |
|---|---|---|
| committer | Thomas Preud'homme <thomas.preudhomme@arm.com> | 2016-08-26 11:53:30 +0100 |
| commit | 1a336194b70b712074a3f5479a01cc221003a152 (patch) | |
| tree | 77d4f16fb202dd9a8805b0e081d87a683a90e13e /include/symcat.h | |
| parent | 980aa3e6dfeb0f018915f65be4b2987667f31fe9 (diff) | |
| download | gdb-1a336194b70b712074a3f5479a01cc221003a152.zip gdb-1a336194b70b712074a3f5479a01cc221003a152.tar.gz gdb-1a336194b70b712074a3f5479a01cc221003a152.tar.bz2 | |
Add missing ARMv8-M special registers
2016-08-26 Thomas Preud'homme <thomas.preudhomme@arm.com>
gas/
* config/tc-arm.c (v7m_psrs): Add MSPLIM, PSPLIM, MSPLIM_NS,
PSPLIM_NS, PRIMASK_NS, BASEPRI_NS, FAULTMASK_NS, CONTROL_NS, SP_NS and
their lowecase counterpart special registers. Write register
identifier in hex.
* testsuite/gas/arm/archv8m-cmse-msr.s: Reorganize tests per
operation, special register and then case. Use different register for
each operation. Add tests for new special registers.
* testsuite/gas/arm/archv8m-cmse-msr-base.d: Adapt expected result
accordingly.
* testsuite/gas/arm/archv8m-cmse-msr-main.d: Likewise.
* testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise.
opcodes/
* arm-dis.c (psr_name): Use hex as case labels. Add detection for
MSPLIM, PSPLIM, MSPLIM_NS, PSPLIM_NS, PRIMASK_NS, BASEPRI_NS,
FAULTMASK_NS, CONTROL_NS and SP_NS special registers.
Diffstat (limited to 'include/symcat.h')
0 files changed, 0 insertions, 0 deletions