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authorAndrew Jenner <andrew@codesourcery.com>2016-08-01 09:42:31 -0700
committerAndrew Jenner <andrew@codesourcery.com>2016-08-01 09:42:31 -0700
commitdfdaec14b0db059497b47b515d753b6383772b6b (patch)
tree72366f1f5328fe6631d4727d2b82daa9e800c0df /include/opcode
parent751b375e01e7e85aeccdd965578cb2040836593d (diff)
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Fix some PowerPC VLE BFD issues and add some PowerPC VLE instructions.
bfd/ * elf32-ppc.c (is_branch_reloc): Recognise VLE branch relocations. (ppc_elf_howto_raw): Fix dst_mask of R_PPC_VLE_REL15. (ppc_elf_vle_split16): Clear field before inserting. opcodes/ * ppc-opc.c (vle_opcodes): Alias 'e_cmpwi' to 'e_cmpi' and 'e_cmplwi' to 'e_cmpli' instead. (OPVUPRT, OPVUPRT_MASK): Define. (powerpc_opcodes): Add E200Z4 insns. (vle_opcodes): Add context save/restore insns. include/ * opcode/ppc.h (PPC_OPCODE_E200Z4): New define.
Diffstat (limited to 'include/opcode')
-rw-r--r--include/opcode/ppc.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/opcode/ppc.h b/include/opcode/ppc.h
index 628a7a1..d9f973d 100644
--- a/include/opcode/ppc.h
+++ b/include/opcode/ppc.h
@@ -214,6 +214,9 @@ extern const int vle_num_opcodes;
/* Opcode is supported by Vector-Scalar (VSX) Unit from ISA 2.08. */
#define PPC_OPCODE_VSX3 0x40000000000ull
+ /* Opcode is supported by e200z4. */
+#define PPC_OPCODE_E200Z4 0x80000000000ull
+
/* A macro to extract the major opcode from an instruction. */
#define PPC_OP(i) (((i) >> 26) & 0x3f)