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| author | Alan Modra <amodra@gmail.com> | 2019-12-11 13:32:25 +1030 |
|---|---|---|
| committer | Alan Modra <amodra@gmail.com> | 2019-12-11 21:14:19 +1030 |
| commit | 13c9c48599ebc8ad2f3a1fb9f672740219cd3841 (patch) | |
| tree | b304237be09f4f06469122cdcdda658299ebb1ba /include/opcode | |
| parent | 09c78487342254de6a4498f8b3aa1f3f1d508898 (diff) | |
| download | gdb-13c9c48599ebc8ad2f3a1fb9f672740219cd3841.zip gdb-13c9c48599ebc8ad2f3a1fb9f672740219cd3841.tar.gz gdb-13c9c48599ebc8ad2f3a1fb9f672740219cd3841.tar.bz2 | |
bfd signed overflow fixes
Aimed at quietening ubsan.
include/
* opcode/mmix.h (PUSHGO_INSN_BYTE): Make unsigned.
(GO_INSN_BYTE, SETL_INSN_BYTE, INCML_INSN_BYTE, INCMH_INSN_BYTE),
(INCH_INSN_BYTE, SWYM_INSN_BYTE, JMP_INSN_BYTE): Likewise.
bfd/
* elf32-rx.c (elf32_rx_relax_section): Avoid signed overflow.
* libaout.h (N_SET_INFO, N_SET_FLAGS): Likewise.
* netbsd.h (write_object_contents): Likewise.
* elf32-arm.c (bfd_elf32_arm_vfp11_erratum_scan): Likewise.
* libhppa.h (HPPA_R_CONSTANT): Don't signed extend with shifts.
(stm32l4xx_create_replacing_stub_vldm): Don't truncate high bits
with shifts.
* elf32-nds32.h (R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG): Define
using 1u shifted left. Ditto for other macros.
* mmo.c (LOP): Make unsigned.
Diffstat (limited to 'include/opcode')
| -rw-r--r-- | include/opcode/mmix.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/include/opcode/mmix.h b/include/opcode/mmix.h index 4f6f0bb..0f08262 100644 --- a/include/opcode/mmix.h +++ b/include/opcode/mmix.h @@ -173,14 +173,14 @@ extern const struct mmix_spec_reg mmix_spec_regs[]; #define COND_INV_BIT 0x8 #define PRED_INV_BIT 0x10 -#define PUSHGO_INSN_BYTE 0xbe -#define GO_INSN_BYTE 0x9e -#define SETL_INSN_BYTE 0xe3 -#define INCML_INSN_BYTE 0xe6 -#define INCMH_INSN_BYTE 0xe5 -#define INCH_INSN_BYTE 0xe4 -#define SWYM_INSN_BYTE 0xfd -#define JMP_INSN_BYTE 0xf0 +#define PUSHGO_INSN_BYTE 0xbeu +#define GO_INSN_BYTE 0x9eu +#define SETL_INSN_BYTE 0xe3u +#define INCML_INSN_BYTE 0xe6u +#define INCMH_INSN_BYTE 0xe5u +#define INCH_INSN_BYTE 0xe4u +#define SWYM_INSN_BYTE 0xfdu +#define JMP_INSN_BYTE 0xf0u /* We can have 256 - 32 (local registers) - 1 ($255 is not allocatable) global registers. */ |