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| author | Cooper Qu <cooper.qu@linux.alibaba.com> | 2020-09-07 17:25:14 +0800 |
|---|---|---|
| committer | Lifang Xia <lifang_xia@c-sky.com> | 2020-09-09 19:26:34 +0800 |
| commit | 6a1ed9106f4f937eddc194915d6e3ec4ecc79f20 (patch) | |
| tree | d9fdf754703e4e0d810f0a4562ee803ec85a7180 /include/opcode | |
| parent | a2061b9f29ea1ae8d40d5627bb8e704fa9e95a67 (diff) | |
| download | gdb-6a1ed9106f4f937eddc194915d6e3ec4ecc79f20.zip gdb-6a1ed9106f4f937eddc194915d6e3ec4ecc79f20.tar.gz gdb-6a1ed9106f4f937eddc194915d6e3ec4ecc79f20.tar.bz2 | |
CSKY: Change mvtc and mulsw's ISA flag.
gas/
* config/tc-csky.c (CSKYV2_ISA_DSP): CSKY_ISA_DSPE60.
(CSKY_ISA_860): Likewise.
include/
* opcode/csky.h (CSKY_ISA_DSPE60): Define.
opcodes/
* csky-opc.h (csky_v2_opcodes): Change mvtc and mulsw's
ISA flag.
Diffstat (limited to 'include/opcode')
| -rw-r--r-- | include/opcode/csky.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/opcode/csky.h b/include/opcode/csky.h index 1ad7f58..4214543 100644 --- a/include/opcode/csky.h +++ b/include/opcode/csky.h @@ -47,6 +47,7 @@ #define CSKY_ISA_DSP (1L << 20) #define CSKY_ISA_DSP_1E2 (1L << 21) #define CSKY_ISA_DSP_ENHANCE (1L << 22) +#define CSKY_ISA_DSPE60 (1L << 23) /* Base float instruction (803f & 810f). */ #define CSKY_ISA_FLOAT_E1 (1L << 25) |