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authorBen Elliston <bje@au.ibm.com>2007-08-24 00:56:30 +0000
committerBen Elliston <bje@au.ibm.com>2007-08-24 00:56:30 +0000
commitc3d65c1ced61cfb87d77e677ee576a3353ce5e34 (patch)
tree3e88efb3525dcd12b0011f8829c81ccfa75422ff /include/opcode
parentb6a3feb15fba9b3e2b5c13f4cbc558eea5d34d18 (diff)
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binutils/
* doc/binutils.texi (objdump): Document -Mppcps. gas/ * config/tc-ppc.c (parse_cpu): Handle "750cl". (pre_defined_registers): Add "gqr0" to "gqr7", "gqr.0" to "gqr.7". (md_show_usage): Document -m750cl. (md_assemble): Handle two delimiters in succession (eg. `),'). * doc/c-ppc.texi (PowerPC-Opts): Document -m750cl. * testsuite/gas/ppc/ppc.exp: Run ppc70ps dump tests. * testsuite/gas/ppc/ppc750ps.s: New file. * testsuite/gas/ppc/ppc750ps.d: Likewise. include/opcode/ * ppc.h (PPC_OPCODE_PPCPS): New. opcodes/ * ppc-opc.c (PSW, PSWM, PSQ, PSQM, PSD, MTMSRD_L): New. (XOPS, XOPS_MASK, XW, XW_MASK): Likewise. (PPCPS): Likewise. (powerpc_opcodes): Add all pair singles instructions. * ppc-dis.c (powerpc_dialect): Handle "ppcps". (print_ppc_disassembler_options): Document -Mppcps.
Diffstat (limited to 'include/opcode')
-rw-r--r--include/opcode/ChangeLog4
-rw-r--r--include/opcode/ppc.h3
2 files changed, 7 insertions, 0 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index b884a38..afc0807 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,7 @@
+2007-08-08 Ben Elliston <bje@au.ibm.com>
+
+ * ppc.h (PPC_OPCODE_PPCPS): New.
+
2007-07-03 Nathan Sidwell <nathan@codesourcery.com>
* m68k.h: Document j K & E.
diff --git a/include/opcode/ppc.h b/include/opcode/ppc.h
index 6771856..4cd81bf 100644
--- a/include/opcode/ppc.h
+++ b/include/opcode/ppc.h
@@ -146,6 +146,9 @@ extern const int powerpc_num_opcodes;
/* Opcode is only supported by PowerPC Cell family. */
#define PPC_OPCODE_CELL 0x8000000
+/* Opcode is supported by CPUs with paired singles support. */
+#define PPC_OPCODE_PPCPS 0x10000000
+
/* A macro to extract the major opcode from an instruction. */
#define PPC_OP(i) (((i) >> 26) & 0x3f)