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| author | Richard Sandiford <rdsandiford@googlemail.com> | 2003-07-15 07:50:39 +0000 |
|---|---|---|
| committer | Richard Sandiford <rdsandiford@googlemail.com> | 2003-07-15 07:50:39 +0000 |
| commit | 5a7ea749508ca506900e38238305f70dd1cbe164 (patch) | |
| tree | d5eb505d1aad88c7dadeb2bce0154d15fca53449 /include/opcode | |
| parent | ec178e1bbbb2314200cb408997efc934017f9684 (diff) | |
| download | gdb-5a7ea749508ca506900e38238305f70dd1cbe164.zip gdb-5a7ea749508ca506900e38238305f70dd1cbe164.tar.gz gdb-5a7ea749508ca506900e38238305f70dd1cbe164.tar.bz2 | |
include/opcode/
* mips.h (CPU_RM7000): New macro.
(OPCODE_IS_MEMBER): Match CPU_RM7000 against 4650 insns.
bfd/
* archures.c (bfd_mach_mips7000): New.
* bfd-in2.h: Regenerated.
* cpu-mips.c (arch_info_struct): Add an entry for mips:7000.
* elfxx-mips.c (mips_set_isa_flags): Handle bfd_mach_mips7000.
(mips_mach_extensions): Add an entry for it.
opcodes/
* mips-dis.c (mips_arch_choices): Add rm7000 and rm9000 entries.
gas/
* config/tc-mips.c (hilo_interlocks): True for CPU_RM7000.
(mips_cpu_info_table): Add rm7000 and rm9000 entries.
gas/testsuite/
* gas/mips/rm7000.[sd]: New test.
* gas/mips/mips.exp: Run it.
Diffstat (limited to 'include/opcode')
| -rw-r--r-- | include/opcode/ChangeLog | 5 | ||||
| -rw-r--r-- | include/opcode/mips.h | 2 |
2 files changed, 7 insertions, 0 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index c03bd31..11b8b6f 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,8 @@ +2003-07-15 Richard Sandiford <rsandifo@redhat.com> + + * mips.h (CPU_RM7000): New macro. + (OPCODE_IS_MEMBER): Match CPU_RM7000 against 4650 insns. + 2003-07-09 Alexandre Oliva <aoliva@redhat.com> 2000-04-01 Alexandre Oliva <aoliva@cygnus.com> diff --git a/include/opcode/mips.h b/include/opcode/mips.h index 476c8e3..65434a7 100644 --- a/include/opcode/mips.h +++ b/include/opcode/mips.h @@ -451,6 +451,7 @@ struct mips_opcode #define CPU_VR5400 5400 #define CPU_VR5500 5500 #define CPU_R6000 6000 +#define CPU_RM7000 7000 #define CPU_R8000 8000 #define CPU_R10000 10000 #define CPU_R12000 12000 @@ -469,6 +470,7 @@ struct mips_opcode #define OPCODE_IS_MEMBER(insn, isa, cpu) \ (((insn)->membership & isa) != 0 \ || (cpu == CPU_R4650 && ((insn)->membership & INSN_4650) != 0) \ + || (cpu == CPU_RM7000 && ((insn)->membership & INSN_4650) != 0) \ || (cpu == CPU_R4010 && ((insn)->membership & INSN_4010) != 0) \ || (cpu == CPU_VR4100 && ((insn)->membership & INSN_4100) != 0) \ || (cpu == CPU_R3900 && ((insn)->membership & INSN_3900) != 0) \ |