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| author | H.J. Lu <hjl.tools@gmail.com> | 2005-06-20 23:18:39 +0000 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2005-06-20 23:18:39 +0000 |
| commit | b300c311a0740cbe64b5781b34d2f3a9c778273f (patch) | |
| tree | baa95ec6806b2a612df96a2de97ba3770f312e40 /include/opcode | |
| parent | 973a3492d553c8b18c8a3257b4874253c0efa68a (diff) | |
| download | gdb-b300c311a0740cbe64b5781b34d2f3a9c778273f.zip gdb-b300c311a0740cbe64b5781b34d2f3a9c778273f.tar.gz gdb-b300c311a0740cbe64b5781b34d2f3a9c778273f.tar.bz2 | |
gas/
2005-06-20 H.J. Lu <hongjiu.lu@intel.com>
PR 1013
* config/tc-i386.c (md_assemble): Don't call optimize_disp on
movabs.
(optimize_disp): Optimize only if possible. Don't use 64bit
displacement on non-constants and do same on constants if
possible.
gas/testsuite/
2005-06-20 H.J. Lu <hongjiu.lu@intel.com>
PR 1013
* i386/x86_64.s: Add absolute 64bit addressing tests for mov.
* i386/x86_64.s: Updated.
include/opcode/
2005-06-20 H.J. Lu <hongjiu.lu@intel.com>
PR 1013
* i386.h (i386_optab): Update comments for 64bit addressing on
mov. Allow 64bit addressing for mov and movq.
Diffstat (limited to 'include/opcode')
| -rw-r--r-- | include/opcode/ChangeLog | 6 | ||||
| -rw-r--r-- | include/opcode/i386.h | 10 |
2 files changed, 13 insertions, 3 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 45a8026..44e0493 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,9 @@ +2005-06-20 H.J. Lu <hongjiu.lu@intel.com> + + PR 1013 + * i386.h (i386_optab): Update comments for 64bit addressing on + mov. Allow 64bit addressing for mov and movq. + 2005-06-11 John David Anglin <dave.anglin@nrc-cnrc.gc.ca> * hppa.h (pa_opcodes): Use cM and cX instead of cm and cx, diff --git a/include/opcode/i386.h b/include/opcode/i386.h index df1131d..449ffee 100644 --- a/include/opcode/i386.h +++ b/include/opcode/i386.h @@ -83,12 +83,13 @@ static const template i386_optab[] = /* Move instructions. */ #define MOV_AX_DISP32 0xa0 -/* In the 64bit mode the short form mov immediate is redefined to have - 64bit displacement value. */ +/* We put the 64bit displacement first and we only mark constants + larger than 32bit as Disp64. */ +{ "mov", 2, 0xa0, X, Cpu64, bwlq_Suf|D|W, { Disp64, Acc, 0 } }, { "mov", 2, 0xa0, X, CpuNo64,bwl_Suf|D|W, { Disp16|Disp32, Acc, 0 } }, { "mov", 2, 0x88, X, 0, bwlq_Suf|D|W|Modrm, { Reg, Reg|AnyMem, 0} }, /* In the 64bit mode the short form mov immediate is redefined to have - 64bit displacement value. */ + 64bit value. */ { "mov", 2, 0xb0, X, 0, bwl_Suf|W|ShortForm, { EncImm, Reg8|Reg16|Reg32, 0 } }, { "mov", 2, 0xc6, 0, 0, bwlq_Suf|W|Modrm, { EncImm, Reg|AnyMem, 0 } }, { "mov", 2, 0xb0, X, Cpu64, q_Suf|W|ShortForm, { Imm64, Reg64, 0 } }, @@ -1004,6 +1005,9 @@ static const template i386_optab[] = {"movq", 2, 0x0f7f, X, CpuMMX, NoSuf|IgnoreSize|Modrm, { RegMMX, RegMMX|LongMem, 0 } }, {"movq", 2, 0xf30f7e,X,CpuSSE2,NoSuf|IgnoreSize|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, {"movq", 2, 0x660fd6,X,CpuSSE2,NoSuf|IgnoreSize|Modrm, { RegXMM, RegXMM|LLongMem, 0 } }, +/* We put the 64bit displacement first and we only mark constants + larger than 32bit as Disp64. */ +{"movq", 2, 0xa0, X, Cpu64, NoSuf|D|W|Size64, { Disp64, Acc, 0 } }, {"movq", 2, 0x88, X, Cpu64, NoSuf|D|W|Modrm|Size64,{ Reg64, Reg64|AnyMem, 0 } }, {"movq", 2, 0xc6, 0, Cpu64, NoSuf|W|Modrm|Size64, { Imm32S, Reg64|WordMem, 0 } }, {"movq", 2, 0xb0, X, Cpu64, NoSuf|W|ShortForm|Size64,{ Imm64, Reg64, 0 } }, |