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| author | Jakub Jelinek <jakub@redhat.com> | 2000-10-20 10:38:47 +0000 |
|---|---|---|
| committer | Jakub Jelinek <jakub@redhat.com> | 2000-10-20 10:38:47 +0000 |
| commit | 19f7b01094d236648a8b0de2ef24cf8510594e9c (patch) | |
| tree | f2b5235c189cdf610e5e892e7e2e8f48df8e2221 /include/opcode | |
| parent | bb160f3e2dc2b422903eca471137e204c55793c2 (diff) | |
| download | gdb-19f7b01094d236648a8b0de2ef24cf8510594e9c.zip gdb-19f7b01094d236648a8b0de2ef24cf8510594e9c.tar.gz gdb-19f7b01094d236648a8b0de2ef24cf8510594e9c.tar.bz2 | |
gas/
* config/tc-sparc.c (sparc_ip): Fix a bug which caused v9_arg_p
instructions to loose any special insn->architecture mask.
* config/tc-sparc.c (v9a_asr_table): Add v9b ASRs.
(sparc_md_end, sparc_arch_types, sparc_arch,
sparc_elf_final_processing): Handle v8plusb and v9b architectures.
(sparc_ip): Handle siam mode operands. Support v9b ASRs (and
request v9b architecture if they are used).
bfd/
* elf32-sparc.c (elf32_sparc_merge_private_bfd_data,
elf32_sparc_object_p, elf32_sparc_final_write_processing):
Support v8plusb.
* elf64-sparc.c (sparc64_elf_merge_private_bfd_data,
sparc64_elf_object_p): Support v9b.
* archures.c: Declare v8plusb and v9b machines.
* bfd-in2.h: Ditto.
* cpu-sparc.c: Ditto.
include/opcode/
* sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
Note that '3' is used for siam operand.
opcodes/
* sparc-dis.c (v9a_asr_reg_names): Add v9b ASRs.
(compute_arch_mask): Add v8plusb and v9b machines.
(print_insn_sparc): siam mode decoding, accept ASRs up to 25.
* opcodes/sparc-opc.c: Support for Cheetah instruction set.
(prefetch_table): Add #invalidate.
Diffstat (limited to 'include/opcode')
| -rw-r--r-- | include/opcode/ChangeLog | 5 | ||||
| -rw-r--r-- | include/opcode/sparc.h | 6 |
2 files changed, 9 insertions, 2 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 60b910d..32e2baf 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,8 @@ +2000-10-20 Jakub Jelinek <jakub@redhat.com> + + * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B. + Note that '3' is used for siam operand. + 2000-09-22 Jim Wilson <wilson@cygnus.com> * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP. diff --git a/include/opcode/sparc.h b/include/opcode/sparc.h index 4f159bd..423cea7 100644 --- a/include/opcode/sparc.h +++ b/include/opcode/sparc.h @@ -1,5 +1,5 @@ /* Definitions for opcode table for the sparc. - Copyright (C) 1989, 91, 92, 93, 94, 95, 96, 1997 + Copyright (C) 1989, 91, 92, 93, 94, 95, 96, 97, 2000 Free Software Foundation, Inc. This file is part of GAS, the GNU Assembler, GDB, the GNU debugger, and @@ -46,6 +46,7 @@ enum sparc_opcode_arch_val { /* v9 variants must appear last */ SPARC_OPCODE_ARCH_V9, SPARC_OPCODE_ARCH_V9A, /* v9 with ultrasparc additions */ + SPARC_OPCODE_ARCH_V9B, /* v9 with ultrasparc and cheetah additions */ SPARC_OPCODE_ARCH_BAD /* error return from sparc_opcode_lookup_arch */ }; @@ -141,6 +142,7 @@ Kinds of operands: h 22 high bits. X 5 bit unsigned immediate Y 6 bit unsigned immediate + 3 SIAM mode (3 bits). (v9b) K MEMBAR mask (7 bits). (v9) j 10 bit Immediate. (v9) I 11 bit Immediate. (v9) @@ -187,7 +189,7 @@ Kinds of operands: / Ancillary state register in rs1 (v9a) The following chars are unused: (note: ,[] are used as punctuation) -[345] +[45] */ |