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authorAndrew Bennett <andrew.bennett@imgtec.com>2014-04-23 11:24:30 +0100
committerAndrew Bennett <andrew.bennett@imgtec.com>2014-04-23 13:01:18 +0100
commit7d64c587c15f290d228ca550bb288d53f0eb2ac4 (patch)
tree72600357f6d2371bd27de80b4e69a4216855293a /include/opcode
parentcd0449ab05e9045682a81bf521bd0c8732c98feb (diff)
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Add support for the MIPS eXtended Physical Address (XPA) ASE.
ChangeLog: binutils/ * doc/binutils.texi: Document the disassemble MIPS XPA instructions command line option. gas/ * config/tc-mips.c (options): Add OPTION_XPA and OPTION_NO_XPA. (md_longopts): Add xpa and no-xpa command line options. (mips_ases): Add MIPS XPA ASE. (mips_cpu_info_table): Update p5600 entry to allow the XPA ASE. * doc/as.texinfo: Document the MIPS XPA command line options. * doc/c-mips.texi: Document the MIPS XPA command line options, and assembler directives. gas/testsuite/ * gas/mips/mips.exp: Add xpa tests. * gas/mips/xpa.s: New test. * gas/mips/xpa.d: Likewise. include/ * opcode/mips.h (ASE_XPA): New define. opcodes/ * mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2 to allow the MIPS XPA ASE. (parse_mips_dis_option): Process the -Mxpa option. * mips-opc.c (XPA): New define. (mips_builtin_opcodes): Add MIPS XPA instructions and move the locations of the ctc0 and cfc0 instructions.
Diffstat (limited to 'include/opcode')
-rw-r--r--include/opcode/mips.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/opcode/mips.h b/include/opcode/mips.h
index 5cc9d24..a5d2935 100644
--- a/include/opcode/mips.h
+++ b/include/opcode/mips.h
@@ -1155,6 +1155,8 @@ static const unsigned int mips_isa_table[] =
/* MSA Extension */
#define ASE_MSA 0x00000800
#define ASE_MSA64 0x00001000
+/* eXtended Physical Address (XPA) Extension. */
+#define ASE_XPA 0x00002000
/* MIPS ISA defines, use instead of hardcoding ISA level. */