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author | Michael Meissner <gnu@the-meissners.org> | 2006-07-13 22:25:48 +0000 |
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committer | Michael Meissner <gnu@the-meissners.org> | 2006-07-13 22:25:48 +0000 |
commit | 050dfa73dea44eff603e96bcb195113a5e1b2219 (patch) | |
tree | 6b5ed323dac23229e91b11622beb8d232e2f8639 /include/opcode | |
parent | 06d65a1d1e5bdb9f4ac98ea5ec0c156843a71640 (diff) | |
download | gdb-050dfa73dea44eff603e96bcb195113a5e1b2219.zip gdb-050dfa73dea44eff603e96bcb195113a5e1b2219.tar.gz gdb-050dfa73dea44eff603e96bcb195113a5e1b2219.tar.bz2 |
Add amdfam10 instructions
Diffstat (limited to 'include/opcode')
-rw-r--r-- | include/opcode/ChangeLog | 5 | ||||
-rw-r--r-- | include/opcode/i386.h | 14 |
2 files changed, 19 insertions, 0 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 13c3b40..f34985d 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,8 @@ +2006-07-10 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> + Michael Meissner <michael.meissner@amd.com> + + * i386.h: Add amdfam10 new instructions (SSE4a and ABM instructions). + 2006-06-12 H.J. Lu <hongjiu.lu@intel.com> * i386.h (i386_optab): Add "nop" with memory reference. diff --git a/include/opcode/i386.h b/include/opcode/i386.h index 76b5172..2074cfd 100644 --- a/include/opcode/i386.h +++ b/include/opcode/i386.h @@ -1462,6 +1462,20 @@ static const template i386_optab[] = {"vmsave", 0, 0x0f01, 0xdb, CpuSVME, NoSuf|ImmExt, { 0, 0, 0 } }, {"vmsave", 1, 0x0f01, 0xdb, CpuSVME, NoSuf|ImmExt, { AnyMem, 0, 0 } }, + +/* SSE4a instructions */ +{"movntsd", 2, 0xf20f2b, X, CpuSSE4a, NoSuf|IgnoreSize|Modrm, { RegXMM, LongMem, 0 } }, +{"movntss", 2, 0xf30f2b, X, CpuSSE4a, NoSuf|IgnoreSize|Modrm, { RegXMM, WordMem, 0 } }, +{"extrq", 3, 0x660f78, 0, CpuSSE4a, NoSuf|IgnoreSize|Modrm, { Imm8, Imm8, RegXMM } }, +{"extrq", 2, 0x660f79, X, CpuSSE4a, NoSuf|IgnoreSize|Modrm, { RegXMM, RegXMM} }, +{"insertq", 2, 0xf20f79, X, CpuSSE4a, NoSuf|IgnoreSize|Modrm, { RegXMM, RegXMM} }, +{"insertq", 4, 0xf20f78, X, CpuSSE4a, NoSuf|IgnoreSize|Modrm, { Imm8, Imm8, RegXMM, RegXMM} }, + +/* ABM instructions */ +{"popcnt", 2, 0x0fb8, X, CpuABM, wlq_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, +{"lzcnt", 2, 0xf30fbd, X, CpuABM, wlq_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, + + /* VIA PadLock extensions. */ {"xstore-rng",0, 0x000fa7, 0xc0, Cpu686|CpuPadLock, NoSuf|IsString|ImmExt, { 0, 0, 0} }, {"xcrypt-ecb",0, 0xf30fa7, 0xc8, Cpu686|CpuPadLock, NoSuf|IsString|ImmExt, { 0, 0, 0} }, |