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author | Nick Clifton <nickc@redhat.com> | 2018-09-20 13:27:31 +0100 |
---|---|---|
committer | Nick Clifton <nickc@redhat.com> | 2018-09-20 13:32:58 +0100 |
commit | fbaf61ad525eb2818598b699d44df32e46583925 (patch) | |
tree | 72886133a128d6bbd4be1af0804b10119598af3d /include/opcode | |
parent | cf93e9c2cf8f8b2566f8fc86e961592b51b5980d (diff) | |
download | gdb-fbaf61ad525eb2818598b699d44df32e46583925.zip gdb-fbaf61ad525eb2818598b699d44df32e46583925.tar.gz gdb-fbaf61ad525eb2818598b699d44df32e46583925.tar.bz2 |
Andes Technology has good news for you, we plan to update the nds32 port of binutils on upstream!
We have not only removed all unsupported and obsolete code, but also supported lost of new features,
including better link-time relaxations and TLS implementations. Besides, the files generated by the
newly assembler and linker usually get higher performance and more optimized code size.
ld * emultempl/nds32elf.em (hyper_relax): New variable.
(nds32_elf_create_output_section_statements):
the parameters of bfd_elf32_nds32_set_target_option
(PARSE_AND_LIST_PROLOGUE, PARSE_AND_LIST_OPTIONS,
PARSE_AND_LIST_ARGS_CASES): Add new option --mhyper-relax.
* emultempl/nds32elf.em (nds32_elf_after_open): Updated.
* emultempl/nds32elf.em (tls_desc_trampoline): New variable.
* (nds32_elf_create_output_section_statements): Updated.
* (nds32_elf_after_parse): Disable relaxations when PIC is enable.
* (PARSE_AND_LIST_PROLOGUE, PARSE_AND_LIST_OPTIONS,
PARSE_AND_LIST_ARGS_CASES): Add new option --m[no-]tlsdesc-trampoline.
include * elf/nds32.h: Remove the unused target features.
* dis-asm.h (disassemble_init_nds32): Declared.
* elf/nds32.h (E_NDS32_NULL): Removed.
(E_NDS32_HAS_DSP_INST, E_NDS32_HAS_ZOL): New.
* opcode/nds32.h: Ident.
(N32_SUB6, INSN_LW): New macros.
(enum n32_opcodes): Updated.
* elf/nds32.h: Doc fixes.
* elf/nds32.h: Add R_NDS32_LSI.
* elf/nds32.h: Add new relocations for TLS.
gas * config/tc-nds32.c: Remove the unused target features.
(nds32_relax_relocs, md_pseudo_table, nds32_elf_record_fixup_exp,
nds32_set_elf_flags_by_insn, nds32_insert_relax_entry,
nds32_apply_fix): Likewise.
(nds32_no_ex9_begin): Removed.
* config/tc-nds32.c (add_mapping_symbol_for_align,
make_mapping_symbol, add_mapping_symbol): New functions.
* config/tc-nds32.h (enum mstate): New.
(nds32_segment_info_type): Likewise.
* configure.ac (--enable-dsp-ext, --enable-zol-ext): New options.
* config.in: Regenerated.
* configure: Regenerated.
* config/tc-nds32.c (nds32_dx_regs):
Set the value according to the configuration.
(nds32_perf_ext, nds32_perf_ext2, nds32_string_ext, nds32_audio_ext):
Likewise.
(nds32_dsp_ext): New variable. Set the value according to the
configuration.
(nds32_zol_ext): Likewise.
(asm_desc, nds32_pseudo_opcode_table): Make them static.
(nds32_set_elf_flags_by_insn): Updated.
(nds32_check_insn_available): Updated.
(nds32_str_tolower): New function.
* config/tc-nds32.c (relax_table): Updated.
(md_begin): Updated.
(md_assemble): Use XNEW macro to allocate space for `insn.info',
and then remember to free it.
(md_section_align): Cast (-1) to ValueT.
(nds32_get_align): Cast (~0U) to addressT.
(nds32_relax_branch_instructions): Updated.
(md_convert_frag): Add new local variable `final_r_type'.
(invalid_prev_frag): Add new bfd_boolean parameter `relax'.
All callers changed.
* config/tc-nds32.c (struct nds32_relocs_pattern): Add `insn' field.
(struct nds32_hint_map): Add `option_list' field.
(struct suffix_name, suffix_table): Remove the unused `pic' field.
(do_pseudo_b, do_pseudo_bal): Remove the suffix checking.
(do_pseudo_la_internal, do_pseudo_pushpopm): Indent.
(relax_hint_bias, relax_hint_id_current): New static variables.
(reset_bias, relax_hint_begin): New variables.
(nds_itoa): New function.
(CLEAN_REG, GET_OPCODE): New macros.
(struct relax_hint_id): New.
(nds32_relax_hint): For .relax_hint directive, we can use `begin'
and `end' to mark the relax pattern without giving exactly id number.
(nds32_elf_append_relax_relocs): Handle the case that the .relax_hint
directives are attached to pseudo instruction.
(nds32_elf_save_pseudo_pattern): Change the second parameter from
instruction's opcode to byte code.
(nds32_elf_build_relax_relation): Add new bfd_boolean parameter
`pseudo_hint'.
(nds32_lookup_pseudo_opcode): Fix the overflow issue.
(enum nds32_insn_type): Add N32_RELAX_ALU1 and N32_RELAX_16BIT.
(nds32_elf_record_fixup_exp, relax_ls_table, hint_map,
nds32_find_reloc_table, nds32_match_hint_insn, nds32_parse_name):
Updated.
* config/tc-nds32.h (MAX_RELAX_NUM): Extend it to 6.
(enum nds32_relax_hint_type): Merge NDS32_RELAX_HINT_LA and
NDS32_RELAX_HINT_LS into NDS32_RELAX_HINT_LALS. Add
NDS32_RELAX_HINT_LA_PLT, NDS32_RELAX_HINT_LA_GOT and
NDS32_RELAX_HINT_LA_GOTOFF.
* config/tc-nds32.h (relax_ls_table): Add floating load/store
to gp relax pattern.
(hint_map, nds32_find_reloc_table): Likewise.
* configure.ac: Define NDS32_LINUX_TOOLCHAIN.
* configure: Regenerated.
* config.in: Regenerated.
* config/tc-nds32.h (enum nds32_ramp): Updated.
(enum nds32_relax_hint_type): Likewise.
* config/tc-nds32.c: Include "errno.h" and "limits.h".
(relax_ls_table): Add TLS relax patterns.
(nds32_elf_append_relax_relocs): Attach BFD_RELOC_NDS32_GROUP on
each instructions of TLS patterns.
(nds32_elf_record_fixup_exp): Updated.
(nds32_apply_fix): Likewise.
(suffix_table): Add TLSDESC suffix.
binutils* testsuite/binutils-all/objcopy.exp: Set the unsupported reloc number
from 215 to 255 for NDS32.
bfd * elf32-nds32.c (nds32_elf_relax_loadstore):
Remove the unused target features.
(bfd_elf32_nds32_set_target_option): Remove the unused parameters.
(nds32_elf_relax_piclo12, nds32_elf_relax_letlslo12,
nds32_elf_relax_letlsadd, nds32_elf_relax_letlsls,
nds32_elf_relax_pltgot_suff, nds32_elf_relax_got_suff
nds32_elf_relax_gotoff_suff, calculate_plt_memory_address,
calculate_plt_offset, calculate_got_memory_address,
nds32_elf_check_dup_relocs): Removed.
All callers changed.
* elf32-nds32.h: Remove the unused macros and defines.
(elf_nds32_link_hash_table): Remove the unused variable.
(bfd_elf32_nds32_set_target_option): Update prototype.
(nds32_elf_ex9_init): Removed.
* elf32-nds32.c (nds32_convert_32_to_16): Updated.
* elf32-nds32.c (HOWTO2, HOWTO3): Define new HOWTO macros
to initialize array nds32_elf_howto_table in any order
without lots of EMPTY_HOWTO.
(nds32_reloc_map): Updated.
* reloc.c: Add BFD_RELOC_NDS32_LSI.
* bfd-in2.h: Regenerated.
* bfd/libbfd.h: Regenerated.
* elf32-nds32.c (nds32_elf_relax_howto_table): Add R_NDS32_LSI.
(nds32_reloc_map): Likewise.
(nds32_elf_relax_flsi): New function.
(nds32_elf_relax_section): Support floating load/store relaxation.
* elf32-nds32.c (NDS32_GUARD_SEC_P, elf32_nds32_local_gp_offset):
New macro.
(struct elf_nds32_link_hash_entry): New `offset_to_gp' field.
(struct elf_nds32_obj_tdata): New `offset_to_gp' and `hdr_size' fields.
(elf32_nds32_allocate_local_sym_info, nds32_elf_relax_guard,
nds32_elf_is_target_special_symbol, nds32_elf_maybe_function_sym):
New functions.
(nds32_info_to_howto_rel): Add BFD_ASSERT.
(bfd_elf32_bfd_reloc_type_table_lookup, nds32_elf_link_hash_newfunc,
nds32_elf_link_hash_table_create, nds32_elf_relocate_section,
nds32_elf_relax_loadstore, nds32_elf_relax_lo12, nds32_relax_adjust_label,
bfd_elf32_nds32_set_target_option, nds32_fag_mark_relax): Updated.
(nds32_elf_final_sda_base): Improve it to find the better gp value.
(insert_nds32_elf_blank): Must consider `len' when inserting blanks.
* elf32-nds32.h (bfd_elf32_nds32_set_target_option): Update prototype.
(struct elf_nds32_link_hash_table): Add new variable `hyper_relax'.
* elf32-nds32.c (elf32_nds32_allocate_dynrelocs): New function.
(create_got_section): Likewise.
(allocate_dynrelocs, nds32_elf_size_dynamic_sections,
nds32_elf_relocate_section, nds32_elf_finish_dynamic_symbol): Updated.
(nds32_elf_check_relocs): Fix the issue that the shared library may
has TEXTREL entry in the dynamic section.
(nds32_elf_create_dynamic_sections): Enable to call readonly_dynrelocs
since the TEXTREL issue is fixed in the nds32_elf_check_relocs.
(nds32_elf_finish_dynamic_sections): Update and add DT_RELASZ
dynamic entry.
(calculate_offset): Remove the unused parameter `pic_ext_target' and
related codes.
All callers changed.
(elf_backend_dtrel_excludes_plt): Disable it temporarily since it
will cause some errors for our test cases.
* elf32-nds32.c (nds32_elf_merge_private_bfd_data): Allow to link the
generic object.
* reloc.c: Add TLS relocations.
* libbfd.h: Regenerated.
* bfd-in2.h: Regenerated.
* elf32-nds32.h (struct section_id_list_t): New.
(elf32_nds32_lookup_section_id, elf32_nds32_check_relax_group,
elf32_nds32_unify_relax_group, nds32_elf_unify_tls_model):
New prototypes.
(elf32_nds32_compute_jump_table_size, elf32_nds32_local_tlsdesc_gotent):
New macro.
(nds32_insertion_sort, bfd_elf32_nds32_set_target_option,
elf_nds32_link_hash_table): Updated.
* elf32-nds32.c (enum elf_nds32_tls_type): New.
(struct elf32_nds32_relax_group_t, struct relax_group_list_t): New.
(elf32_nds32_add_dynreloc, patch_tls_desc_to_ie, get_tls_type,
fls, ones32, list_insert, list_insert_sibling, dump_chain,
elf32_nds32_check_relax_group, elf32_nds32_lookup_section_id,
elf32_nds32_unify_relax_group, nds32_elf_unify_tls_model): New functions.
(elf_nds32_obj_tdata): Add new fields.
(elf32_nds32_relax_group_ptr, nds32_elf_local_tlsdesc_gotent): New macros.
(nds32_elf_howto_table): Add TLS relocations.
(nds32_reloc_map): Likewise.
(nds32_elf_copy_indirect_symbol, nds32_elf_size_dynamic_sections,
nds32_elf_finish_dynamic_symbol, elf32_nds32_allocate_local_sym_info,
nds32_elf_relocate_section, bfd_elf32_nds32_set_target_option,
nds32_elf_check_relocs, allocate_dynrelocs): Updated.
(nds32_elf_relax_section): Call nds32_elf_unify_tls_model.
(dtpoff_base): Rename it to `gottpof' and then update it.
opcodes * nds32-asm.c (operand_fields): Remove the unused fields.
(nds32_opcodes): Remove the unused instructions.
* nds32-dis.c (nds32_ex9_info): Removed.
(nds32_parse_opcode): Updated.
(print_insn_nds32): Likewise.
* nds32-asm.c (config.h, stdlib.h, string.h): New includes.
(LEX_SET_FIELD, LEX_GET_FIELD): Update defines.
(nds32_asm_init, build_operand_hash_table, build_keyword_hash_table,
build_opcode_hash_table): New functions.
(nds32_keyword_table, nds32_keyword_count_table, nds32_field_table,
nds32_opcode_table): New.
(hw_ktabs): Declare it to a pointer rather than an array.
(build_hash_table): Removed.
* nds32-asm.h (enum): Add SYN_INPUT, SYN_OUTPUT, SYN_LOPT,
SYN_ROPT and upadte HW_GPR and HW_INT.
* nds32-dis.c (keywords): Remove const.
(match_field): New function.
(nds32_parse_opcode): Updated.
* disassemble.c (disassemble_init_for_target):
Add disassemble_init_nds32.
* nds32-dis.c (eum map_type): New.
(nds32_private_data): Likewise.
(get_mapping_symbol_type, is_mapping_symbol, nds32_symbol_is_valid,
nds32_add_opcode_hash_table, disassemble_init_nds32): New functions.
(print_insn_nds32): Updated.
* nds32-asm.c (parse_aext_reg): Add new parameter.
(parse_re, parse_re2, parse_aext_reg): Only reduced registers
are allowed to use.
All callers changed.
* nds32-asm.c (keyword_usr, keyword_sr): Updated.
(operand_fields): Add new fields.
(nds32_opcodes): Add new instructions.
(keyword_aridxi_mx): New keyword.
* nds32-asm.h (enum): Add NASM_ATTR_DSP_ISAEXT, HW_AEXT_ARIDXI_MX
and NASM_ATTR_ZOL.
(ALU2_1, ALU2_2, ALU2_3): New macros.
* nds32-dis.c (nds32_filter_unknown_insn): Updated.
Diffstat (limited to 'include/opcode')
-rw-r--r-- | include/opcode/nds32.h | 204 |
1 files changed, 181 insertions, 23 deletions
diff --git a/include/opcode/nds32.h b/include/opcode/nds32.h index 4d113be..82782de 100644 --- a/include/opcode/nds32.h +++ b/include/opcode/nds32.h @@ -21,19 +21,20 @@ #define OPCODE_NDS32_H /* Registers. */ -#define REG_R5 5 -#define REG_R8 8 -#define REG_R10 10 -#define REG_R12 12 -#define REG_R15 15 -#define REG_R16 16 -#define REG_R20 20 -#define REG_TA 15 -#define REG_TP 27 -#define REG_FP 28 -#define REG_GP 29 -#define REG_LP 30 -#define REG_SP 31 +#define REG_R0 (0) +#define REG_R5 (5) +#define REG_R8 (8) +#define REG_R10 (10) +#define REG_R12 (12) +#define REG_R15 (15) +#define REG_R16 (16) +#define REG_R20 (20) +#define REG_TA (15) +#define REG_TP (25) +#define REG_FP (28) +#define REG_GP (29) +#define REG_LP (30) +#define REG_SP (31) /* Macros for extracting fields or making an instruction. */ static const int nds32_r45map[] ATTRIBUTE_UNUSED = @@ -146,6 +147,7 @@ static const int nds32_r54map[] ATTRIBUTE_UNUSED = #define N32_RD5(insn) (((insn) >> 5) & 0x1f) #define N32_SH5(insn) (((insn) >> 5) & 0x1f) #define N32_SUB5(insn) (((insn) >> 0) & 0x1f) +#define N32_SUB6(insn) (((insn) >> 0) & 0x3f) #define N32_SWID(insn) (((insn) >> 5) & 0x3ff) #define N32_IMMU(insn, bs) ((insn) & __MASK (bs)) #define N32_IMMS(insn, bs) ((signed) __SEXT (((insn) & __MASK (bs)), bs)) @@ -275,7 +277,7 @@ enum n32_opcodes N32_BR1_BNE = 1, /* bit[16:19] */ - N32_BR2_IFCALL = 0, + N32_BR2_SOP0 = 0, N32_BR2_BEQZ = 2, N32_BR2_BNEZ = 3, N32_BR2_BGEZ = 4, @@ -365,7 +367,8 @@ enum n32_opcodes N32_ALU2_FFZMISM, N32_ALU2_KADD = 0x18, N32_ALU2_KSUB, - N32_ALU2_KSLRA, + N32_ALU2_KSLRAW, + N32_ALU2_KSLRAWu, N32_ALU2_MFUSR = 0x20, N32_ALU2_MTUSR, N32_ALU2_0x22, @@ -381,20 +384,173 @@ enum n32_opcodes N32_ALU2_MSUB64, N32_ALU2_DIVS, N32_ALU2_DIV, - N32_ALU2_0x30 = 0x30, + N32_ALU2_ADD64 = 0x30, N32_ALU2_MULT32, - N32_ALU2_0x32, + N32_ALU2_SMAL, N32_ALU2_MADD32, - N32_ALU2_0x34, + N32_ALU2_SUB64, N32_ALU2_MSUB32, - - /* bit[0:5], where bit[6:9] != 0 */ + N32_ALU2_0x36, + N32_ALU2_0x37, + N32_ALU2_RADD64 = 0x38, + N32_ALU2_URADD64, + N32_ALU2_KADD64, + N32_ALU2_UKADD64, + N32_ALU2_RSUB64, + N32_ALU2_URSUB64, + N32_ALU2_KSUB64, + N32_ALU2_UKSUB64, + + /* bit[0:5], where bit[6:9] = 0001 */ + N32_ALU2_SMAR64 = 0x0, + N32_ALU2_UMAR64, + N32_ALU2_SMSR64, + N32_ALU2_UMSR64, + N32_ALU2_KMAR64, + N32_ALU2_UKMAR64, + N32_ALU2_KMSR64, + N32_ALU2_UKMSR64, + N32_ALU2_SMALDA = 0x8, + N32_ALU2_SMSLDA, + N32_ALU2_SMALDS, + N32_ALU2_SMALBB, N32_ALU2_FFBI = 0xe, N32_ALU2_FLMISM = 0xf, + N32_ALU2_SMALXDA = 0x10, + N32_ALU2_SMSLXDA, + N32_ALU2_SMALXDS, + N32_ALU2_SMALBT, + N32_ALU2_SMALDRS = 0x1a, + N32_ALU2_SMALTT, + N32_ALU2_RDOV = 0x20, + N32_ALU2_CLROV, N32_ALU2_MULSR64 = 0x28, N32_ALU2_MULR64 = 0x29, - N32_ALU2_MADDR32 = 0x33, - N32_ALU2_MSUBR32 = 0x35, + N32_ALU2_SMDS = 0x30, + N32_ALU2_SMXDS, + N32_ALU2_SMDRS, + N32_ALU2_MADDR32, + N32_ALU2_KMADRS, + N32_ALU2_MSUBR32, + N32_ALU2_KMADS, + N32_ALU2_KMAXDS, + + /* bit[0:5], where bit[6:9] = 0010 */ + N32_ALU2_KADD16 = 0x0, + N32_ALU2_KSUB16, + N32_ALU2_KCRAS16, + N32_ALU2_KCRSA16, + N32_ALU2_KADD8, + N32_ALU2_KSUB8, + N32_ALU2_WEXT, + N32_ALU2_WEXTI, + N32_ALU2_UKADD16 = 0x8, + N32_ALU2_UKSUB16, + N32_ALU2_UKCRAS16, + N32_ALU2_UKCRSA16, + N32_ALU2_UKADD8, + N32_ALU2_UKSUB8, + N32_ALU2_ONEOP = 0xf, + N32_ALU2_SMBB = 0x10, + N32_ALU2_SMBT, + N32_ALU2_SMTT, + N32_ALU2_KMABB = 0x15, + N32_ALU2_KMABT, + N32_ALU2_KMATT, + N32_ALU2_KMDA = 0x18, + N32_ALU2_KMXDA, + N32_ALU2_KMADA, + N32_ALU2_KMAXDA, + N32_ALU2_KMSDA, + N32_ALU2_KMSXDA, + N32_ALU2_RADD16 = 0x20, + N32_ALU2_RSUB16, + N32_ALU2_RCRAS16, + N32_ALU2_RCRSA16, + N32_ALU2_RADD8, + N32_ALU2_RSUB8, + N32_ALU2_RADDW, + N32_ALU2_RSUBW, + N32_ALU2_URADD16 = 0x28, + N32_ALU2_URSUB16, + N32_ALU2_URCRAS16, + N32_ALU2_URCRSA16, + N32_ALU2_URADD8, + N32_ALU2_URSUB8, + N32_ALU2_URADDW, + N32_ALU2_URSUBW, + N32_ALU2_ADD16 = 0x30, + N32_ALU2_SUB16, + N32_ALU2_CRAS16, + N32_ALU2_CRSA16, + N32_ALU2_ADD8, + N32_ALU2_SUB8, + N32_ALU2_BITREV, + N32_ALU2_BITREVI, + N32_ALU2_SMMUL = 0x38, + N32_ALU2_SMMULu, + N32_ALU2_KMMAC, + N32_ALU2_KMMACu, + N32_ALU2_KMMSB, + N32_ALU2_KMMSBu, + N32_ALU2_KWMMUL, + N32_ALU2_KWMMULu, + + /* bit[0:5], where bit[6:9] = 0011 */ + N32_ALU2_SMMWB = 0x0, + N32_ALU2_SMMWBu, + N32_ALU2_SMMWT, + N32_ALU2_SMMWTu, + N32_ALU2_KMMAWB, + N32_ALU2_KMMAWBu, + N32_ALU2_KMMAWT, + N32_ALU2_KMMAWTu, + N32_ALU2_PKTT16 = 0x8, + N32_ALU2_PKTB16, + N32_ALU2_PKBT16, + N32_ALU2_PKBB16, + N32_ALU2_0x10 = 0x10, + N32_ALU2_SCLIP16, + N32_ALU2_0x12, + N32_ALU2_SMAX16, + N32_ALU2_SMAX8 = 0x17, + N32_ALU2_0x18 = 0x18, + N32_ALU2_UCLIP16, + N32_ALU2_0x1a, + N32_ALU2_UMAX16, + N32_ALU2_UMAX8 = 0x1f, + N32_ALU2_SRA16 = 0x20, + N32_ALU2_SRA16u, + N32_ALU2_SRL16, + N32_ALU2_SRL16u, + N32_ALU2_SLL16, + N32_ALU2_KSLRA16, + N32_ALU2_KSLRA16u, + N32_ALU2_SRAu, + N32_ALU2_SRAI16 = 0x28, + N32_ALU2_SRAI16u, + N32_ALU2_SRLI16, + N32_ALU2_SRLI16u, + N32_ALU2_SLLI16, + N32_ALU2_KSLLI16, + N32_ALU2_KSLLI, + N32_ALU2_SRAIu, + N32_ALU2_CMPEQ16 = 0x30, + N32_ALU2_SCMPLT16, + N32_ALU2_SCMPLE16, + N32_ALU2_SMIN16, + N32_ALU2_CMPEQ8, + N32_ALU2_SCMPLT8, + N32_ALU2_SCMPLE8, + N32_ALU2_SMIN8, + N32_ALU2_0x38, + N32_ALU2_UCMPLT16 = 0x39, + N32_ALU2_UCMPLE16, + N32_ALU2_UMIN16, + N32_ALU2_0x3c, + N32_ALU2_UCMPLT8, + N32_ALU2_UCMPLE8, + N32_ALU2_UMIN8, /* bit[0:5] */ N32_MEM_LB = 0, @@ -459,7 +615,8 @@ enum n32_opcodes N32_MISC_MSYNC, N32_MISC_ISYNC, N32_MISC_TLBOP, - N32_MISC_0xf, + N32_MISC_SPECL, + N32_MISC_BPICK = 0x10, /* bit[0:4] */ N32_SIMD_PBSAD = 0, @@ -704,6 +861,7 @@ enum n16_opcodes #define INSN_ANDI 0x54000000 #define INSN_LDI 0x06000000 #define INSN_SDI 0x16000000 +#define INSN_LW 0x38000002 #define INSN_LWI 0x04000000 #define INSN_LWSI 0x24000000 #define INSN_LWIP 0x0c000000 |