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| author | Matthew Green <mrg@redhat.com> | 2001-10-17 13:13:16 +0000 |
|---|---|---|
| committer | Matthew Green <mrg@redhat.com> | 2001-10-17 13:13:16 +0000 |
| commit | f5c120c5dcc817baeafc0db53d03e84735616eb2 (patch) | |
| tree | e5e9b43103821f3917cb6422c4fd9910e047e97a /include/opcode | |
| parent | 973ffd6335bb35d78d2ea2b844019f38ac9dbba5 (diff) | |
| download | gdb-f5c120c5dcc817baeafc0db53d03e84735616eb2.zip gdb-f5c120c5dcc817baeafc0db53d03e84735616eb2.tar.gz gdb-f5c120c5dcc817baeafc0db53d03e84735616eb2.tar.bz2 | |
[gas/ChangeLog]
* config/tc-ppc.c (md_show_usage): Add missing -maltivec, -m7400,
-m7410, -m7450 and -m7455 options.
[gas/testsuite/ChangeLog]
* gas/ppc/altivec.s: New test for AltiVec.
* gas/ppc/altivec.d: New file.
* gas/ppc/ppc.exp: Test altivec.s
[include/opcode/ChangeLog]
* ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
[opcodes/ChangeLog]
* ppc-opc.c (STRM): New AltiVec operand.
(XDSS): New AltiVec instruction form.
(mtvscr): Correct operand list.
(dst, dstt, dstst, dststt, dss, dssall): AltiVec instructions.
Diffstat (limited to 'include/opcode')
| -rw-r--r-- | include/opcode/ChangeLog | 4 | ||||
| -rw-r--r-- | include/opcode/ppc.h | 2 |
2 files changed, 5 insertions, 1 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 690b19c..ec236b3 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,7 @@ +2001-10-17 matthew green <mrg@redhat.com> + + * ppc.h (PPC_OPCODE_BOOKE64): Fix typo. + 2001-10-12 matthew green <mrg@redhat.com> * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New diff --git a/include/opcode/ppc.h b/include/opcode/ppc.h index 26a96ec..c313696 100644 --- a/include/opcode/ppc.h +++ b/include/opcode/ppc.h @@ -98,7 +98,7 @@ extern const int powerpc_num_opcodes; #define PPC_OPCODE_BOOKE (04000) /* Opcode is only supported by 64-bit Motorola BookE processor. */ -#define PPC_OPCODE_BOOKE64 (001000) +#define PPC_OPCODE_BOOKE64 (010000) /* A macro to extract the major opcode from an instruction. */ #define PPC_OP(i) (((i) >> 26) & 0x3f) |