diff options
| author | Nick Clifton <nickc@redhat.com> | 2000-12-02 01:10:33 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2000-12-02 01:10:33 +0000 |
| commit | c6c98b3833d01c45200708006011e5cecd461fac (patch) | |
| tree | c07dc1c4a235bd50c648bec5d6adbc70a0c844ef /include/opcode/mips.h | |
| parent | 84ea6cf2c5170547163a4bf09ac2bbb3cd424685 (diff) | |
| download | gdb-c6c98b3833d01c45200708006011e5cecd461fac.zip gdb-c6c98b3833d01c45200708006011e5cecd461fac.tar.gz gdb-c6c98b3833d01c45200708006011e5cecd461fac.tar.bz2 | |
Add MIPS SB1 machine
Diffstat (limited to 'include/opcode/mips.h')
| -rw-r--r-- | include/opcode/mips.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/include/opcode/mips.h b/include/opcode/mips.h index bd8f023..af6c66c 100644 --- a/include/opcode/mips.h +++ b/include/opcode/mips.h @@ -359,9 +359,10 @@ struct mips_opcode #define CPU_R10000 10000 #define CPU_MIPS16 16 #define CPU_MIPS32 32 -#define CPU_MIPS32_4K 3204113 /* 32, 04, octal 'K' */ +#define CPU_MIPS32_4K 3204113 /* 32, 04, octal 'K'. */ #define CPU_MIPS5 5 #define CPU_MIPS64 64 +#define CPU_SB1 12310201 /* octal 'SB', 01. */ /* Test for membership in an ISA including chip specific ISAs. INSN is pointer to an element of the opcode table; ISA is the @@ -369,7 +370,7 @@ struct mips_opcode to test, or zero if no CPU specific ISA test is desired. The gp32 arg is set when you need to force 32-bit register usage on a machine with 64-bit registers; see the documentation under -mgp32 - in the MIPS gas docs. */ + in the MIPS gas docs. */ #define OPCODE_IS_MEMBER(insn, isa, cpu, gp32) \ ((((insn)->membership & isa) != 0 \ |