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authorClaudiu Zissulescu <claziss@synopsys.com>2016-09-14 13:40:38 +0200
committerClaudiu Zissulescu <claziss@synopsys.com>2016-09-26 16:47:17 +0200
commit2b848ebdbb2d1f856c7525ed4d6efaf6fe70de81 (patch)
tree55a6c5fb94d76ce44c2ec41f30a06f1daa427b5c /include/opcode/arc.h
parent005d79fd6101dae0aaf62a1b0cee399efcbd0e21 (diff)
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[ARC] ISA alignment.
include/ 2016-09-26 Claudiu Zissulescu <claziss@synopsys.com> * opcode/arc.h (insn_class_t): Add two new classes. opcodes/ 2016-09-26 Claudiu Zissulescu <claziss@synopsys.com> * arc-ext-tbl.h (EXTINSN2OPF): Define. (EXTINSN2OP): Use EXTINSN2OPF. (bspeekm, bspop, modapp): New extension instructions. * arc-opc.c (F_DNZ_ND): Define. (F_DNZ_D): Likewise. (F_SIZEB1): Changed. (C_DNZ_D): Define. (C_HARD): Changed. * arc-tbl.h (dbnz): New instruction. (prealloc): Allow it for ARC EM. (xbfu): Likewise.
Diffstat (limited to 'include/opcode/arc.h')
-rw-r--r--include/opcode/arc.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/include/opcode/arc.h b/include/opcode/arc.h
index faa63dc..09e973b 100644
--- a/include/opcode/arc.h
+++ b/include/opcode/arc.h
@@ -43,6 +43,7 @@ typedef enum
ARITH,
AUXREG,
BITOP,
+ BITSTREAM,
BMU,
BRANCH,
CONTROL,
@@ -55,7 +56,8 @@ typedef enum
LOGICAL,
MEMORY,
NET,
- PMU
+ PMU,
+ XY
} insn_class_t;
/* Instruction Subclass. */