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| author | Sudakshina Das <sudi.das@arm.com> | 2018-09-26 10:52:51 +0100 |
|---|---|---|
| committer | Richard Earnshaw <Richard.Earnshaw@arm.com> | 2018-10-09 15:17:10 +0100 |
| commit | 2ac435d46608be7ef90f80aaf9ff48443aea571e (patch) | |
| tree | 9adf96d34751880e859e59074696a51b5b8debc4 /include/opcode/aarch64.h | |
| parent | 68dfbb92ef5f013a315d652c88ede2082c16a88e (diff) | |
| download | gdb-2ac435d46608be7ef90f80aaf9ff48443aea571e.zip gdb-2ac435d46608be7ef90f80aaf9ff48443aea571e.tar.gz gdb-2ac435d46608be7ef90f80aaf9ff48443aea571e.tar.bz2 | |
[PATCH, BINUTILS, AARCH64, 4/9] Add Execution and Data Restriction instructions
This patch is part of the patch series to add support for ARMv8.5-A
extensions.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/docs/ddi0596/a/a64-base-instructions-alphabetic-order)
This patch adds the prediction restriction instructions (that is, cfp,
dvp, cpp). These instructions are retrospectively made optional for
all versions of the architecture from ARMv8.0 to ARMv8.4 and is
mandatory from ARMv8.5. Hence adding a new +predres which can be used
by the older architectures.
*** include/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_PREDRES): New.
(AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_PREDRES by default.
(aarch64_opnd): Add AARCH64_OPND_SYSREG_SR.
(aarch64_sys_regs_sr): Declare new table.
*** opcodes/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* aarch64-dis.c (aarch64_ext_sysins_op): Add case for
AARCH64_OPND_SYSREG_SR.
* aarch64-opc.c (aarch64_print_operand): Likewise.
(aarch64_sys_regs_sr): Define table.
(aarch64_sys_ins_reg_supported_p): Check for RCTX with
AARCH64_FEATURE_PREDRES.
* aarch64-tbl.h (aarch64_feature_predres): New.
(PREDRES, PREDRES_INSN): New.
(aarch64_opcode_table): Add entries for cfp, dvp and cpp.
(AARCH64_OPERANDS): Add new description for SYSREG_SR.
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Regenerate.
* aarch64-opc-2.c: Regenerate.
*** gas/ChangeLog ***
2018-10-09 Sudakshina Das <sudi.das@arm.com>
* config/tc-aarch64.c (aarch64_sys_regs_sr_hsh): New.
(parse_operands): Add entry for AARCH64_OPND_SYSREG_SR.
(md_begin): Allocate and initialize aarch64_sys_regs_sr_hsh
with aarch64_sys_regs_sr.
(aarch64_features): Add new "predres" option for older
architectures.
* doc/c-aarch64.texi: Document the same.
* testsuite/gas/aarch64/sysreg-4.s: New.
* testsuite/gas/aarch64/sysreg-4.d: New.
* testsuite/gas/aarch64/illegal-sysreg-4.d: New.
* testsuite/gas/aarch64/illegal-sysreg-4.l: New.
* testsuite/gas/aarch64/predres.s: New.
* testsuite/gas/aarch64/predres.d: New.
Diffstat (limited to 'include/opcode/aarch64.h')
| -rw-r--r-- | include/opcode/aarch64.h | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index 7e113e4..7b542c9 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -70,6 +70,8 @@ typedef uint32_t aarch64_insn; #define AARCH64_FEATURE_FRINTTS 0x8000000000ULL /* SB instruction. */ #define AARCH64_FEATURE_SB 0x10000000000ULL +/* Execution and Data Prediction Restriction instructions. */ +#define AARCH64_FEATURE_PREDRES 0x20000000000ULL /* Architectures are the sum of the base and extensions. */ #define AARCH64_ARCH_V8 AARCH64_FEATURE (AARCH64_FEATURE_V8, \ @@ -97,7 +99,8 @@ typedef uint32_t aarch64_insn; AARCH64_FEATURE_V8_5 \ | AARCH64_FEATURE_FLAGMANIP \ | AARCH64_FEATURE_FRINTTS \ - | AARCH64_FEATURE_SB) + | AARCH64_FEATURE_SB \ + | AARCH64_FEATURE_PREDRES) #define AARCH64_ARCH_NONE AARCH64_FEATURE (0, 0) @@ -272,6 +275,7 @@ enum aarch64_opnd AARCH64_OPND_SYSREG_DC, /* System register <dc_op> operand. */ AARCH64_OPND_SYSREG_IC, /* System register <ic_op> operand. */ AARCH64_OPND_SYSREG_TLBI, /* System register <tlbi_op> operand. */ + AARCH64_OPND_SYSREG_SR, /* System register RCTX operand. */ AARCH64_OPND_BARRIER, /* Barrier operand. */ AARCH64_OPND_BARRIER_ISB, /* Barrier operand for ISB. */ AARCH64_OPND_PRFOP, /* Prefetch operation. */ @@ -915,6 +919,7 @@ extern const aarch64_sys_ins_reg aarch64_sys_regs_ic []; extern const aarch64_sys_ins_reg aarch64_sys_regs_dc []; extern const aarch64_sys_ins_reg aarch64_sys_regs_at []; extern const aarch64_sys_ins_reg aarch64_sys_regs_tlbi []; +extern const aarch64_sys_ins_reg aarch64_sys_regs_sr []; /* Shift/extending operator kinds. N.B. order is important; keep aarch64_operand_modifiers synced. */ |