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authorRichard Sandiford <richard.sandiford@arm.com>2016-09-21 16:57:43 +0100
committerRichard Sandiford <richard.sandiford@arm.com>2016-09-21 16:57:43 +0100
commit047cd301d40288d13e44f3322541ac28ebe06078 (patch)
tree4aa6ac53c8f70e677ea23c6627d94c8e914de3aa /include/objalloc.h
parent165d4950855493dd904a7996e7fcf58880d54219 (diff)
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[AArch64][SVE 29/32] Add new SVE core & FP register operands
SVE uses some new fields to store W, X and scalar FP registers. This patch adds corresponding operands. include/ * opcode/aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd. (AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd) (AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise. opcodes/ * aarch64-tbl.h (AARCH64_OPERANDS): Add entries for the new SVE core and FP register operands. * aarch64-opc.h (FLD_SVE_Rm, FLD_SVE_Rn, FLD_SVE_Vd, FLD_SVE_Vm) (FLD_SVE_Vn): New aarch64_field_kinds. * aarch64-opc.c (fields): Add corresponding entries. (aarch64_print_operand): Handle the new SVE core and FP register operands. * aarch64-opc-2.c: Regenerate. * aarch64-asm-2.c: Likewise. * aarch64-dis-2.c: Likewise. gas/ * config/tc-aarch64.c (parse_operands): Handle the new SVE core and FP register operands.
Diffstat (limited to 'include/objalloc.h')
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