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| author | Simon Marchi <simon.marchi@ericsson.com> | 2018-06-18 11:31:15 -0400 |
|---|---|---|
| committer | Simon Marchi <simon.marchi@ericsson.com> | 2018-06-19 14:15:17 -0400 |
| commit | d856f9a8d64ef35b66000c42981f2f66f133d794 (patch) | |
| tree | 22671111fb762f8625d61d8f4209da7e540a9037 /include/longlong.h | |
| parent | 6ae502670996ec6e8b574dbaa4577d79fa9e9799 (diff) | |
| download | gdb-d856f9a8d64ef35b66000c42981f2f66f133d794.zip gdb-d856f9a8d64ef35b66000c42981f2f66f133d794.tar.gz gdb-d856f9a8d64ef35b66000c42981f2f66f133d794.tar.bz2 | |
include: Sync with GCC
Bring changes from GCC in shared headers.
include/ChangeLog:
Sync with GCC
2018-05-24 Tom Rix <trix@juniper.net>
* dwarf2.def (DW_FORM_strx*, DW_FORM_addrx*): New.
2017-11-20 Kito Cheng <kito.cheng@gmail.com>
* longlong.h [__riscv] (__umulsidi3): Define.
[__riscv] (umul_ppmm): Likewise.
[__riscv] (__muluw3): Likewise.
Diffstat (limited to 'include/longlong.h')
| -rw-r--r-- | include/longlong.h | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/include/longlong.h b/include/longlong.h index fb982dd..7f3dc17 100644 --- a/include/longlong.h +++ b/include/longlong.h @@ -1050,6 +1050,56 @@ extern UDItype __umulsidi3 (USItype, USItype); } while (0) #endif +#if defined(__riscv) +#ifdef __riscv_mul +#define __umulsidi3(u,v) ((UDWtype)(UWtype)(u) * (UWtype)(v)) +#define __muluw3(a, b) ((UWtype)(a) * (UWtype)(b)) +#else +#if __riscv_xlen == 32 + #define MULUW3 "call __mulsi3" +#elif __riscv_xlen == 64 + #define MULUW3 "call __muldi3" +#else +#error unsupport xlen +#endif /* __riscv_xlen */ +/* We rely on the fact that MULUW3 doesn't clobber the t-registers. + It can get better register allocation result. */ +#define __muluw3(a, b) \ + ({ \ + register UWtype __op0 asm ("a0") = a; \ + register UWtype __op1 asm ("a1") = b; \ + asm volatile (MULUW3 \ + : "+r" (__op0), "+r" (__op1) \ + : \ + : "ra", "a2", "a3"); \ + __op0; \ + }) +#endif /* __riscv_mul */ +#define umul_ppmm(w1, w0, u, v) \ + do { \ + UWtype __x0, __x1, __x2, __x3; \ + UHWtype __ul, __vl, __uh, __vh; \ + \ + __ul = __ll_lowpart (u); \ + __uh = __ll_highpart (u); \ + __vl = __ll_lowpart (v); \ + __vh = __ll_highpart (v); \ + \ + __x0 = __muluw3 (__ul, __vl); \ + __x1 = __muluw3 (__ul, __vh); \ + __x2 = __muluw3 (__uh, __vl); \ + __x3 = __muluw3 (__uh, __vh); \ + \ + __x1 += __ll_highpart (__x0);/* this can't give carry */ \ + __x1 += __x2; /* but this indeed can */ \ + if (__x1 < __x2) /* did we get it? */ \ + __x3 += __ll_B; /* yes, add it in the proper pos. */ \ + \ + (w1) = __x3 + __ll_highpart (__x1); \ + (w0) = __ll_lowpart (__x1) * __ll_B + __ll_lowpart (__x0); \ + } while (0) +#endif /* __riscv */ + #if defined(__sh__) && W_TYPE_SIZE == 32 #ifndef __sh1__ #define umul_ppmm(w1, w0, u, v) \ |