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author | Yoshinori Sato <ysato@users.sourceforge.jp> | 2015-12-15 09:26:56 +0000 |
---|---|---|
committer | Nick Clifton <nickc@redhat.com> | 2015-12-15 09:26:56 +0000 |
commit | a117b0a51cd3c768453c244a3754c1b9a77e74fc (patch) | |
tree | fd573106470e4c963aa723316530c87ed5ba2a36 /include/elf | |
parent | ef603459d553034a3f4daeb9c8c673f5ef3e4ed0 (diff) | |
download | gdb-a117b0a51cd3c768453c244a3754c1b9a77e74fc.zip gdb-a117b0a51cd3c768453c244a3754c1b9a77e74fc.tar.gz gdb-a117b0a51cd3c768453c244a3754c1b9a77e74fc.tar.bz2 |
Add support for RX V2 Instruction Set
binutils
* readelf.c(get_machine_flags): Add v2 flag.
gas
* config/rx-defs.h(rx_cpu_type): Add RXV2 type.
* config/tc-rx.c(cpu_type_list): New type lookup table.
(md_parse_option): Use lookup table for choose cpu.
(md_show_usage): Add rxv2 for mcpu option.
* doc/c-rx.texi: Likewise.
* config/rx-parse.y: Add v2 instructions and ACC register.
(rx_check_v2): check v2 type.
include/elf
* rx.h(E_FLAG_RX_V2): New RXv2 type.
include/opcode
* rx.h: Add new instructions.
opcoes
* rx-deocde.opc(rx_decode_opcode): Add new instructions pattern.
* rx-dis.c(register_name): Add new register.
gas/testsuite
* gas/rx/emaca.d: New.
* gas/rx/emaca.sm: New.
* gas/rx/emsba.d: New.
* gas/rx/emsba.sm: New.
* gas/rx/emula.d: New.
* gas/rx/emula.sm: New.
* gas/rx/fadd.d: Add new pattern.
* gas/rx/fadd.sm: Add new pattern.
* gas/rx/fmul.d: Add new pattern.
* gas/rx/fmul.sm: Add new pattern.
* gas/rx/fsqrt.d: New.
* gas/rx/fsqrt.sm: New.
* gas/rx/fsub.d: Add new pattern.
* gas/rx/fsub.sm: Add new pattern.
* gas/rx/ftou.d: New.
* gas/rx/ftou.sm: New.
* gas/rx/maclh.d: New.
* gas/rx/maclh.sm: New.
* gas/rx/maclo.d: Add new pattern.
* gas/rx/maclo.sm: Add new pattern.
* gas/rx/macros.inc: Add new register.
* gas/rx/movco.d: New.
* gas/rx/movco.sm: New.
* gas/rx/movli.d: New.
* gas/rx/movli.sm: New.
* gas/rx/msbhi.d: New.
* gas/rx/msbhi.sm: New.
* gas/rx/msblh.d: New.
* gas/rx/msblh.sm: New.
* gas/rx/msblo.d: New.
* gas/rx/msblo.sm: New.
* gas/rx/mullh.d: New.
* gas/rx/mullh.sm: New.
* gas/rx/mvfacgu.d: New.
* gas/rx/mvfacgu.sm: New.
* gas/rx/mvfachi.d: Add new pattern.
* gas/rx/mvfachi.sm: Add new pattern.
* gas/rx/mvfaclo.d: Add new pattern.
* gas/rx/mvfaclo.sm: Add new pattern.
* gas/rx/mvfacmi.d: Add new pattern.
* gas/rx/mvfacmi.sm: Add new pattern.
* gas/rx/mvfc.d: Add new pattern.
* gas/rx/mvtacgu.d: New.
* gas/rx/mvtacgu.sm: New.
* gas/rx/mvtc.d: Add new pattern.
* gas/rx/popc.d: Add new pattern.
* gas/rx/pushc.d: Add new pattern.
* gas/rx/racl.d: New.
* gas/rx/racl.sm: New.
* gas/rx/racw.d: Add new pattern.
* gas/rx/racw.sm: Add new pattern.
* gas/rx/rdacl.d: New.
* gas/rx/rdacl.sm: New.
* gas/rx/rdacw.d: New.
* gas/rx/rdacw.sm: New.
* gas/rx/rx.exp: Add option.
* gas/rx/stnz.d: Add new pattern.
* gas/rx/stnz.sm: Add new pattern.
* gas/rx/stz.d: Add new pattern.
* gas/rx/stz.sm: Add new pattern.
* gas/rx/utof.d: New.
* gas/rx/utof.sm: New.
Diffstat (limited to 'include/elf')
-rw-r--r-- | include/elf/ChangeLog | 4 | ||||
-rw-r--r-- | include/elf/rx.h | 2 |
2 files changed, 5 insertions, 1 deletions
diff --git a/include/elf/ChangeLog b/include/elf/ChangeLog index e6e7af9..5b98c66 100644 --- a/include/elf/ChangeLog +++ b/include/elf/ChangeLog @@ -1,3 +1,7 @@ +2015-12-14 Yoshinori Sato <ysato@users.sourceforge.jp> + + * rx.h (E_FLAG_RX_V2): New RXv2 type. + 2015-12-07 Alan Modra <amodra@gmail.com> * ppc64.h (R_PPC64_ENTRY): Define. diff --git a/include/elf/rx.h b/include/elf/rx.h index f945dac..fa2cbdf 100644 --- a/include/elf/rx.h +++ b/include/elf/rx.h @@ -119,11 +119,11 @@ END_RELOC_NUMBERS (R_RX_max) #define E_FLAG_RX_DSP (1 << 1) /* Defined in the RX CPU Object file specification, but not explained. */ #define E_FLAG_RX_PID (1 << 2) /* Unofficial - DJ */ #define E_FLAG_RX_ABI (1 << 3) /* Binary passes stacked arguments using natural alignment. Unofficial - NC. */ - #define E_FLAG_RX_SINSNS_SET (1 << 6) /* Set if bit-5 is significant. */ #define E_FLAG_RX_SINSNS_YES (1 << 7) /* Set if string instructions are used in the binary. */ #define E_FLAG_RX_SINSNS_NO 0 /* Bit-5 if this binary must not be linked with a string instruction using binary. */ #define E_FLAG_RX_SINSNS_MASK (3 << 6) /* Mask of bits used to determine string instruction use. */ +#define E_FLAG_RX_V2 (1 << 8) /* RX v2 instructions */ /* These define the addend field of R_RX_RH_RELAX relocations. */ #define RX_RELAXA_IMM6 0x00000010 /* Imm8/16/24/32 at bit offset 6. */ |