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authorAlan Modra <amodra@gmail.com>2016-06-07 22:04:38 +0930
committerAlan Modra <amodra@gmail.com>2016-06-07 22:04:38 +0930
commit14b57c7c6a53c747a8819fed3da858eae4195a0e (patch)
treea58d1965b9a9ba6b40dfb02e9cadd008a45d44f8 /include/elf
parent2091da296fd563f62d856dcb5a049a63484ed65e (diff)
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PowerPC VLE
VLE is an encoding, not a particular processor architecture, so it isn't really proper to select insns based on PPC_OPCODE_VLE. For example {"evaddw", VX (4, 512), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, {"vaddubs", VX (4, 512), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, shows two insns that have the same encoding, both available with VLE. Enabling both with VLE means we can't disassemble the second variant even if -Maltivec is given rather than -Mspe. Also, we don't check user assembly against the processor type as well as we could. Another problem is that when using the VLE encoding, insns from the main ppc opcode table are not available, except those using opcode 4 and 31. Correcting this revealed two errors in the ld testsuite, use of "nop" and "rfmci" when -mvle. This patch fixes those problems in the opcode table, and removes PPCNONE. I find a plain 0 distracts less from other values. In addition, I've implemented code to recognize some machine values from the apuinfo note present in ppc32 objects. It's not a complete disambiguation since we're lacking info to detect newer chips, but what we have should help with disassembly. include/ * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL, PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK, PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK, PPC_APUINFO_VLE: Define. opcodes/ * ppc-dis.c (ppc_opts): Delete extraneous parentheses. Default cpu for "vle" to e500. * ppc-opc.c (ALLOW8_SPRG): Remove PPC_OPCODE_VLE. (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW, DCBT_EO): Likewise. (PPCNONE): Delete, substitute throughout. (powerpc_opcodes): Remove PPCVLE from "flags". Add to "deprecated" except for major opcode 4 and 31. (vle_opcodes <se_rfmci>): Add PPCRFMCI to flags. bfd/ * cpu-powerpc.c (powerpc_compatible): Allow bfd_mach_ppc_vle entry to match other 32-bit archs. * elf32-ppc.c (_bfd_elf_ppc_set_arch): New function. (ppc_elf_object_p): Call it. (ppc_elf_special_sections): Use APUINFO_SECTION_NAME. Fix overlong line. (APUINFO_SECTION_NAME, APUINFO_LABEL): Don't define here. * elf64-ppc.c (ppc64_elf_object_p): Call _bfd_elf_ppc_set_arch. * bfd-in.h (_bfd_elf_ppc_at_tls_transform, _bfd_elf_ppc_at_tprel_transform): Move to.. * elf-bfd.h: ..here. (_bfd_elf_ppc_set_arch): Declare. * bfd-in2.h: Regenerate. gas/ * config/tc-ppc.c (PPC_APUINFO_ISEL, PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK, PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK, PPC_APUINFO_VLE): Don't define. (ppc_setup_opcodes): Check vle disables powerpc_opcodes overridden by vle_opcodes, and that vle flag doesn't enable opcodes. Don't add vle_opcodes twice. (ppc_cleanup): Use APUINFO_SECTION_NAME and APUINFO_LABEL. ld/ * testsuite/ld-powerpc/apuinfo1.s: Delete nop. * testsuite/ld-powerpc/apuinfo-vle2.s: New. * testsuite/ld-powerpc/powerpc.exp: Use apuinfo-vle2.s.
Diffstat (limited to 'include/elf')
-rw-r--r--include/elf/ppc.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/include/elf/ppc.h b/include/elf/ppc.h
index 43b36c1..f4a6bbd 100644
--- a/include/elf/ppc.h
+++ b/include/elf/ppc.h
@@ -202,6 +202,19 @@ END_RELOC_NUMBERS (R_PPC_max)
specified in the associated \
symbol table entry. */
+/* APUinfo note section. */
+#define APUINFO_SECTION_NAME ".PPC.EMB.apuinfo"
+#define APUINFO_LABEL "APUinfo"
+
+#define PPC_APUINFO_ISEL 0x40
+#define PPC_APUINFO_PMR 0x41
+#define PPC_APUINFO_RFMCI 0x42
+#define PPC_APUINFO_CACHELCK 0x43
+#define PPC_APUINFO_SPE 0x100
+#define PPC_APUINFO_EFS 0x101
+#define PPC_APUINFO_BRLOCK 0x102
+#define PPC_APUINFO_VLE 0x104
+
/* Object attribute tags. */
enum
{