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authorTimothy Wall <twall@alum.mit.edu>2001-11-13 14:22:53 +0000
committerTimothy Wall <twall@alum.mit.edu>2001-11-13 14:22:53 +0000
commit6e9179034707f18294ae1cbebcc7e9714a46951d (patch)
tree85f85a20b4ea7e4ff949b0703aae7c42bc8ed6b7 /include/coff/tic54x.h
parent1a78a35acfb696d2262b7c2d707b9e6421c99aaa (diff)
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Fix tic54x testsuite failures and Lmem disassembly bugs.
Diffstat (limited to 'include/coff/tic54x.h')
-rw-r--r--include/coff/tic54x.h27
1 files changed, 26 insertions, 1 deletions
diff --git a/include/coff/tic54x.h b/include/coff/tic54x.h
index a41c8d2..a7b7003 100644
--- a/include/coff/tic54x.h
+++ b/include/coff/tic54x.h
@@ -18,8 +18,8 @@
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#ifndef COFF_TIC54X_H
-
#define COFF_TIC54X_H
+
#define TIC54X_TARGET_ID 0x98
#define TIC54XALGMAGIC 0x009B /* c54x algebraic assembler output */
#define TIC5X_TARGET_ID 0x92
@@ -29,6 +29,31 @@
#define TICOFF_TARGET_ARCH bfd_arch_tic54x
#define TICOFF_DEFAULT_MAGIC TICOFF1MAGIC /* we use COFF1 for compatibility */
+/* Page macros
+
+ The first GDB port requires flags in its remote memory access commands to
+ distinguish between data/prog space. Hopefully we can make this go away
+ eventually. Stuff the page in the upper bits of a 32-bit address, since
+ the c5x family only uses 16 or 23 bits.
+
+ c2x, c5x and most c54x devices have 16-bit addresses, but the c548 has
+ 23-bit program addresses. Make sure the page flags don't interfere.
+ These flags are used by GDB to identify the destination page for
+ addresses.
+*/
+
+/* Recognized load pages (by common convention). */
+#define PG_PROG 0x0 /* PROG page */
+#define PG_DATA 0x1 /* DATA page */
+#define PG_IO 0x2 /* I/O page */
+
+/** Indicate whether the given storage class requires a page flag. */
+#define NEEDS_PAGE(X) ((X)==C_EXT)
+#define PAGE_MASK 0xFF000000
+#define ADDR_MASK 0x00FFFFFF
+#define PG_TO_FLAG(p) (((unsigned long)(p) & 0xFF) << 24)
+#define FLAG_TO_PG(f) (((f) >> 24) & 0xFF)
+
#include "coff/ti.h"
#endif /* COFF_TIC54X_H */