diff options
| author | Maciej W. Rozycki <macro@orcam.me.uk> | 2021-05-29 03:26:32 +0200 |
|---|---|---|
| committer | Maciej W. Rozycki <macro@orcam.me.uk> | 2021-05-29 03:26:32 +0200 |
| commit | b1458c4569ec9eeb077e928b0eb6b210c7eb647f (patch) | |
| tree | d82486e9a8cf3d39b54d5338d6d44b6de311145b /include/ChangeLog | |
| parent | dd8444682498d975be541793fe00ababe3223b6d (diff) | |
| download | gdb-b1458c4569ec9eeb077e928b0eb6b210c7eb647f.zip gdb-b1458c4569ec9eeb077e928b0eb6b210c7eb647f.tar.gz gdb-b1458c4569ec9eeb077e928b0eb6b210c7eb647f.tar.bz2 | |
MIPS/opcodes: Factor out ISA matching against flags
In preparation for the next change factor out code for ISA matching
against instruction flags used in MIPS opcode tables, similarly to how
CPU matching is already done. No functional change, though for clarity
split the single `if' statement into multiple ones and use temporaries
rather than repeated expressions.
include/
* opcode/mips.h (isa_is_member): New inline function, factored
out from...
(opcode_is_member): ... here.
Diffstat (limited to 'include/ChangeLog')
| -rw-r--r-- | include/ChangeLog | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/include/ChangeLog b/include/ChangeLog index d0cc5c4..b51782f 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,5 +1,11 @@ 2021-05-29 Maciej W. Rozycki <macro@orcam.me.uk> + * opcode/mips.h (isa_is_member): New inline function, factored + out from... + (opcode_is_member): ... here. + +2021-05-29 Maciej W. Rozycki <macro@orcam.me.uk> + * opcode/mips.h: Document `g' and `y' operand codes. (mips_reg_operand_type): Add OP_REG_CONTROL enumeration constant. |