aboutsummaryrefslogtreecommitdiff
path: root/include/ChangeLog
diff options
context:
space:
mode:
authorCooper Qu <cooper.qu@linux.alibaba.com>2020-09-02 14:06:03 +0800
committerLifang Xia <lifang_xia@c-sky.com>2020-09-02 14:21:31 +0800
commit4211a3400108b45732415cda0cacb087ab8690b1 (patch)
tree780aa663468ff715258195d610048c841aeda8ea /include/ChangeLog
parent8119cc38379eb136a62b64f642ab4e3b6d4c6abd (diff)
downloadgdb-4211a3400108b45732415cda0cacb087ab8690b1.zip
gdb-4211a3400108b45732415cda0cacb087ab8690b1.tar.gz
gdb-4211a3400108b45732415cda0cacb087ab8690b1.tar.bz2
CSKY: Add CPU CK803r3.
Move divul and divsl to CSKYV2_ISA_3E3R3 instruction set, which is enabled by ck803r3, and it's still a part of enhance DSP instruction set. gas/ * config/tc-csky.c (csky_cpus): Add ck803r3. (CSKY_ISA_803R3): Define. (CSKY_ISA_803R2): Refine, use CSKY_ISA_803R1. include/ * opcode/csky.h (CSKYV2_ISA_3E3R3): Define. opcodes/ * csky-opc.h (csky_v2_opcodes): Move divul and divsl to CSKYV2_ISA_3E3R3 instruction set.
Diffstat (limited to 'include/ChangeLog')
-rw-r--r--include/ChangeLog4
1 files changed, 4 insertions, 0 deletions
diff --git a/include/ChangeLog b/include/ChangeLog
index 9daa866..c6f00b3 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,7 @@
+2020-09-02 Cooper Qu <cooper.qu@linux.alibaba.com>
+
+ * opcode/csky.h (CSKYV2_ISA_3E3R3): Define.
+
2020-08-31 Alan Modra <amodra@gmail.com>
PR 26493