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| author | Alan Modra <amodra@gmail.com> | 2017-08-30 20:35:35 +0930 |
|---|---|---|
| committer | Alan Modra <amodra@gmail.com> | 2017-08-30 20:43:31 +0930 |
| commit | 9a23f96e919ba91587d077b1d399246dde4002dd (patch) | |
| tree | 1eb693e16708eef776aece4643cda8dfde86301c /gold | |
| parent | b9f04fe0dfe64bc6224e7bb96378607f17da7446 (diff) | |
| download | gdb-9a23f96e919ba91587d077b1d399246dde4002dd.zip gdb-9a23f96e919ba91587d077b1d399246dde4002dd.tar.gz gdb-9a23f96e919ba91587d077b1d399246dde4002dd.tar.bz2 | |
PowerPC TPREL16_HA/LO reloc optimization
In the TLS GD/LD to LE optimization, ld replaces a sequence like
addi 3,2,x@got@tlsgd R_PPC64_GOT_TLSGD16 x
bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x
R_PPC64_REL24 __tls_get_addr
nop
with
addis 3,13,x@tprel@ha R_PPC64_TPREL16_HA x
addi 3,3,x@tprel@l R_PPC64_TPREL16_LO x
nop
When the tprel offset is small, this can be further optimized to
nop
addi 3,13,x@tprel
nop
bfd/
* elf64-ppc.c (struct ppc_link_hash_table): Add do_tls_opt.
(ppc64_elf_tls_optimize): Set it.
(ppc64_elf_relocate_section): Nop addis on TPREL16_HA, and convert
insn on TPREL16_LO and TPREL16_LO_DS relocs to use r13 when
addis would add zero.
* elf32-ppc.c (struct ppc_elf_link_hash_table): Add do_tls_opt.
(ppc_elf_tls_optimize): Set it.
(ppc_elf_relocate_section): Nop addis on TPREL16_HA, and convert
insn on TPREL16_LO relocs to use r2 when addis would add zero.
gold/
* powerpc.cc (Target_powerpc::Relocate::relocate): Nop addis on
TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS
relocs to use r2/r13 when addis would add zero.
ld/
* testsuite/ld-powerpc/tls.s: Add calls with tls markers.
* testsuite/ld-powerpc/tls32.s: Likewise.
* testsuite/ld-powerpc/powerpc.exp: Run tls marker tests.
* testsuite/ld-powerpc/tls.d: Adjust for TPREL16_HA/LO optimization.
* testsuite/ld-powerpc/tlsexe.d: Likewise.
* testsuite/ld-powerpc/tlsexetoc.d: Likewise.
* testsuite/ld-powerpc/tlsld.d: Likewise.
* testsuite/ld-powerpc/tlsmark.d: Likewise.
* testsuite/ld-powerpc/tlsopt4.d: Likewise.
* testsuite/ld-powerpc/tlstoc.d: Likewise.
Diffstat (limited to 'gold')
| -rw-r--r-- | gold/ChangeLog | 6 | ||||
| -rw-r--r-- | gold/powerpc.cc | 32 |
2 files changed, 38 insertions, 0 deletions
diff --git a/gold/ChangeLog b/gold/ChangeLog index 9359493..2343215 100644 --- a/gold/ChangeLog +++ b/gold/ChangeLog @@ -1,3 +1,9 @@ +2017-08-30 Alan Modra <amodra@gmail.com> + + * powerpc.cc (Target_powerpc::Relocate::relocate): Nop addis on + TPREL16_HA, and convert insn on TPREL16_LO and TPREL16_LO_DS + relocs to use r2/r13 when addis would add zero. + 2017-08-29 Alan Modra <amodra@gmail.com> * options.h (tls_get_addr_optimize): New option. diff --git a/gold/powerpc.cc b/gold/powerpc.cc index 7f3f025..ff116e3 100644 --- a/gold/powerpc.cc +++ b/gold/powerpc.cc @@ -8974,6 +8974,38 @@ Target_powerpc<size, big_endian>::Relocate::relocate( } break; + case elfcpp::R_POWERPC_TPREL16_HA: + if (parameters->options().tls_optimize() && value + 0x8000 < 0x10000) + { + Insn* iview = reinterpret_cast<Insn*>(view - d_offset); + Insn insn = elfcpp::Swap<32, big_endian>::readval(iview); + if ((insn & ((0x3f << 26) | 0x1f << 16)) + != ((15u << 26) | ((size == 32 ? 2 : 13) << 16))) + ; + else + { + elfcpp::Swap<32, big_endian>::writeval(iview, nop); + return true; + } + } + break; + + case elfcpp::R_PPC64_TPREL16_LO_DS: + if (size == 32) + // R_PPC_TLSGD, R_PPC_TLSLD + break; + // Fall through. + case elfcpp::R_POWERPC_TPREL16_LO: + if (parameters->options().tls_optimize() && value + 0x8000 < 0x10000) + { + Insn* iview = reinterpret_cast<Insn*>(view - d_offset); + Insn insn = elfcpp::Swap<32, big_endian>::readval(iview); + insn &= ~(0x1f << 16); + insn |= (size == 32 ? 2 : 13) << 16; + elfcpp::Swap<32, big_endian>::writeval(iview, insn); + } + break; + case elfcpp::R_PPC64_ENTRY: value = (target->got_section()->output_section()->address() + object->toc_base_offset()); |